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Software/EDA Channel

Software/EDA related topics

ARTICLES

NI to showcase NI AWR Design Environment software at EDI CON 2015

NI (formerly AWR Corp.) will be showcasing NI AWR Design Environment™ software at Booth #315 at the Electronic Design Innovation Conference 2015 (EDI CON), being held April 14-16 in Beijing, China. Additionally, NI AWR Design Environment software will be showcased in four 20-minute talks as well as one 40-minute workshop during the week.


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Microsemi's TimeProvider 5000 supports phase synchronization for LTE-A and small cells

Microsemi Corp., a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, today announced its award-winning TimeProvider® 5000 Software Release 2.2, adding ITU-T G.8275.1 phase synchronization profile support with a software upgrade and license key. The new software release now supports Synchronous Ethernet and the IEEE 1588 Precision Time Protocol (PTP) phase profile.


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Mentor Graphics announces HyperLynx tool for power-aware signal integrity simulation

Mentor Graphics Corp. announced its newest version of the HyperLynx® Signal Integrity/Power Integrity (SI/PI) product for high-speed printed circuit board (PCB) designs. The HyperLynx product addresses high-speed systems design problems throughout the design flow—starting at the earliest architectural stages through post-layout verification.


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Altium announces updates to flagship high-speed PCB design tool

Altium Ltd., a global leader in electronic design automation, native 3D PCB design systems (Altium Designer®, CircuitStudio®, PCBWorks®, CircuitMaker®), ECAD design data management (Altium Vault®) and embedded software development toolkits (TASKING®), has announced the next update to its flagship PCB design tool, Altium Designer. Altium Designer 15.1 will introduce several new features for improved design productivity, documentation outputs and high-speed design efficiency.


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EVENTS

Training/User Meetings

COMSOL Training Courses

Training/User Meetings

FEKO events calender

Training/User Meetings

CST Workshops and Trainings

CST
CST Workshops and Trainings

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Training/User Meetings

ANSYS Global Events

Webinars

How to Design an RF/Microwave Power Amplifier: The Basics

4/9/15

Keysight Logo    Innovations in EDA Webcast

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Webinars

802.11ah, Bluetooth LE, Zigbee and Wi-SUN Test for IoT/M2M

4/23/15

Keysight Logo    Keysight Technologies Webcast

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Webinars

Narrowband Combline Filter Design with ANSYS HFSS

4/23/15


Technical Education Webinar Series

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DOCUMENTS AND FILES

RF/Microwave Design for MMICs, MCMs and Hybrid Modules

Miniaturization of consumer products, aerospace and defense systems, medical devices, and LED arrays has spawned the development of a technology known as the multi-chip module (MCM), which combines multiple integrated circuits (ICs), semiconductors dies, and other discrete components within a unifying substrate for use as a single component. This two-part white paper outlines the steps for implementing an integrated design flow within the AWR Microwave Office® design environment for MMICs, MCMs and modules.  Design flow considerations for both a GaAs PHEMT power amplifier design as well as for an MCM microwave monolithic integrated circuit (MMIC) design on a microwave laminate module are discussed. 

RF/Microwave EDA Software Design Flow Considerations for PA MMIC Design

The evolution of integrated circuit technology demands that designers in this field adapt to ever-changing manufacturing techniques driven by performance, cost, benefit, and risk demands. Today’s power amplifier (PA) designer working in solid state technologies must navigate a plethora of available processes, including gallium arsenide (GaAs), gallium nitride (GaN) and silicon carbide (SiC) pseudomorphic high electron mobility transistor (PHEMT), radio-frequency complementary metal oxide semiconductor (RF CMOS), and GaAs or silicon germanium (SiGe) heterojunction bipolar transistor (HBT), to name just a few. Similarly, different design challenges demand different amplifier classes and/or topologies like Class AB, Darlingtons, switch-mode PAs, and digital predistortion.

Understanding and Correctly Predicting Critical Metrics for Wireless RF Links

Traditional modeling methods such as rules of thumb and spreadsheet calculations (Friis equations) give limited insight on the full performance of an RF link in next-generation wireless products. This white paper highlights the advantages of using specialized RF system simulation software to accurately predict critical metrics for wireless RF links.

Leverage Circuit Envelope Simulation to Improve

Optimizing a PA design for one parameter invariably requires sacrifi cing the performance of another. This delicate balance between performance and effi ciency is not the only conundrum, because designers of 4G PAs must also contend with demands for greater instantaneous bandwidth. As a result, designers of next-generation PAs are relying on simulation more than ever before, and their tasks include frequency domain simulation, time domain simulation, and now circuit envelope simulation.

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