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Recent Advances in Radar Technology
Using Calibration to Optimize Performance in Crucial Measurements
The Crolles2 Alliance partners, Freescale Semiconductor, Philips and STMicroelectronics, have extended the scope of their joint semiconductor research and development activities to include R&D related to wafer testing and packaging, in addition to the original development of sub 100 nm CMOS process technologies. This agreement reflects the special needs of wafer testing and packaging for devices produced on 300 mm wafers in 90 nm, 65 nm CMOS and beyond. It will look at all aspects of post-fabrication wafer processing including probing, grinding, sawing, die attach, wire-bonding, flip chip and package moulding techniques as well as optimization of bond-pad stack design. The expanded relationship builds on two years of successful collaboration in the semiconductor industry’s largest R&D alliance. By combining efforts, alliance members have achieved several milestones in 90 nm production and 65 nm process development. The partners will establish a new research laboratory in Grenoble (France) staffed by about 20 scientists and technicians drawn from the three companies. The lab will focus on bond-pad stack design and the assessment of low stress probing, sawing and assembly processes including laser cutting and low stress moulding materials. It will also investigate requirements specification for the next generation of assembly and test equipment. The new Crolles2 Alliance assembly and test R&D team will also work closely with key equipment suppliers.