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Agilent Technologies Inc. announced the availability of a new parameter extraction solution for high voltage (HV) complementary metal oxide semiconductor (CMOS) devices used in a range of automotive and consumer products, as well as LCD and display driver applications. The HVMOS extraction package, for use with Agilent's Integrated Circuit Characterization and Analysis Program (IC-CAP) software platform, enables engineers to model HV CMOS devices using Synopsys' HSPICE simulator, HVMOS Level 66 compact model.
Implemented as a compact model in HSPICE, HVMOS Level 66 compact model outperforms most other HVMOS model solutions in speed and convergence. The HVMOS model includes all relevant physical effects unique to high-voltage operation, including symmetric and asymmetric source and drain resistances, quasi-saturation, transconductance fall off at high-gate voltage, and self-heating effects. As a result, it allows HV CMOS devices to be modeled with unparalleled DC and capacitance modeling accuracy and simulation speed. HVMOS models are used by both analog and digital designers during circuit simulation.
With its advanced optimization, tuning and graphical features, Agilent IC-CAP now provides the best software environment for extracting the Level 66 model. An improved link from IC-CAP to Synopsys' HSPICE simulator facilitates the most efficient extraction of the HVMOS model using an optimized sequence of dedicated extraction steps.
"The advanced HVMOS model is another example of how HSPICE continues to deliver innovation for the most accurate simulation solution for complex IC designs," said Paul Lo, senior vice president of Synopsys' Analog Mixed Signal Group. "By collaborating with Agilent on this HVMOS package for its model parameter extraction tool, we enable HSPICE customers to quickly deploy the leading-edge HVMOS model with superior accuracy and usability."
"We are extremely excited to kick off our collaboration with Synopsys by announcing a robust, fast and accurate solution in the area of HV CMOS modeling; especially given that Synopsys' HVMOS model plays such a critical role in answering a real industry need," said Jim McGillivary, vice president and general manager of Agilent's EEsof EDA Division. "For the past several months we have actively supported Synopsys' device-modeling team in its efforts to extend IC-CAP software for this important application. Thanks to these efforts, device-modeling engineers using HSPICE have access to HSPICE models that are supported by industry-standard device-modeling tools."
In addition to its collaboration with Synopsys, Agilent recently opened a dedicated R&D device-modeling center in China. Both efforts reinforce Agilent's commitment to continue to provide a complete modeling solution to CMOS modeling engineers.
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