Samsung Electronics has introduced its newest RF technology based on an 8 nm node, a foundry process designed to provide a one chip solution for 5G communications, supporting multi-channel and multi-antenna chip designs.
Compared to 14 nm RF, Samsung’s 8 nm RF process technology provides up to a 35 percent increase in power efficiency with a 35 percent decrease in the RF chip area. Samsung says its 8 nm RF platform extension expands its leadership in the 5G semiconductor market from sub-6 GHz to mmWave applications.
Samsung’s 8 nm RF process technology is the latest addition to its portfolio of RF-related solutions, including 28 and 14 nm. The company has demonstrated its RF market capabilities by shipping more than 500 million mobile RFICs for premium smartphones since 2017.
Hyung Jin Lee, master of Foundry Technology Development Team at Samsung Electronics, said, “Through excellence in innovation and process manufacturing, we’ve reinforced our next-generation wireless communication offerings. As 5G mmWave expands, Samsung’s 8 nm RF will be a great solution for customers looking for long battery life and excellent signal quality on compact mobile devices.”
Samsung’s New RFeFET™ Architecture
With continued scaling to advanced nodes, digital circuits have improved significantly in performance, power consumption and area, where analog/RF blocks haven’t achieved similar improvements because of degenerative parasitics, such as increased resistance from narrow line widths. Most communications ICs tend to see degraded RF characteristics, such as lower gain and output power versus frequency with increased power consumption.
To overcome these analog/RF scaling challenges, Samsung developed a unique architecture for RF at 8 nm, named RFextremeFET (RFeFET), to significantly improve RF performance and use less power. Compared to 14 nm RF, Samsung’s RFeFET supplements digital scaling and restores analog/RF scaling at the same time, enabling high performance 5G platforms. Samsung’s process optimization maximizes channel mobility and minimizes parasitics. As the performance of RFeFET is improved, the total number of transistors of RFICs and the area of analog/RF blocks can be reduced.