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Greater demand for longer battery life and improved data throughput for wireless devices challenges designers and test engineers to find new approaches to address linearity, bandwidth and power efficiency in wireless components. These engineering teams are often asked to improve the efficiency of the RF power amplifier (PA), an essential component of wireless communication systems and one of the largest consumers of power in wireless devices. Another significant PA design and test challenge looms just around the corner, as modulation formats supporting 160 MHz bandwidth will drive the need for even wider measurement bandwidth. Of course, device manufacturers are pushing for ever-faster test times to increase production throughput.

PAs are inherently nonlinear. The nonlinearity generates spectral regrowth, which leads to adjacent channel interference and potential violations of the out-of-band emissions standards mandated by regulatory bodies. It also causes in-band distortions which degrade the bit-error-rate (BER) and data throughput of the communications system. Higher peak-to-average power ratios (PAPR) of the newer OFDM transmission formats have more infrequent outlying peak powers that can cause hard clipping in the PA. This degrades the spectral mask compliance, error vector magnitude (EVM) and BER for the entire waveform. Designers often address these infrequent intervals of higher peak power levels by purposely operating the PA at a lower power. Horribly inefficient, it is typical to see PAs operating at less than 10 percent efficiency, as much as 90 percent of the DC power lost.

Today’s RF PA typically supports multiple modes, frequency ranges and modulation formats, increasing the number of required tests. Thousands of tests are not uncommon. Newer techniques like crest factor reduction (CFR), digital predistortion (DPD) and envelope tracking (ET) can be employed to optimize the PA’s performance and power efficiency, but these techniques only add complexity to the tests, further slowing down the design and test process. Adding wider bandwidth support to the RF PA can drive up required DPD measurement bandwidths by five times, to beyond 1 GHz, complicating test even more.

The trend towards greater integration of components on the RF PA and front-end module (FEM) helps improve efficiency, while supporting a wider range of frequency bands and modulation formats by a single FEM. Incorporating the ET power supply, or modulator, on the FEM is another logical step to reduce the overall real estate required inside the mobile device. A larger number of filter/duplexer banks to support a wide range of operating frequencies will add to the device complexity and number of tests.

Speeding Test Development and Execution

Through a collaborative effort between a test equipment vendor and its customer – an industry-leading RF PA design engineering team – working to solve the team’s most critical test issues, the RF PA/FEM reference solution was born. Developed by Keysight Technologies, the test equipment vendor, the reference solution is a combination of Keysight and non-Keysight hardware and software with open source example test code optimized for RF PA and FEM characterization and test.

Figure 1

Figure 1 Reference solution architecture.

Key hardware elements, shown in Figure 1, include Keysight’s PXIe vector network analyzer(s), vector signal generator(s) and vector signal analyzer(s), selected for speed and performance. Keysight’s Signal Studio signal creation software for power amplifier test (N7614B) provides the backbone for this solution: a test flow with techniques for CFR, ET and DPD. Engineers can select from pre-loaded Signal Studio or user-defined I/Q waveforms that can be imported. The open source reference solution control software enables tight synchronization between the signal source and arbitrary waveform generator, resulting in optimal alignment between RF and ET signals.

Early speed improvements were realized by taking advantage of the FPGA technology in both the source and receiver components to reduce the time the servo loops need to achieve the required output power from the device under test (DUT). Since power servos are non-deterministic, list mode – typically the quickest method of executing test steps – cannot be used to correct output power based on input RF levels. Keysight developed a fast baseband tuning mechanism in its PXIe vector signal generator (VSG) which programmatically performs iterations until the correct output power is achieved, typically in less than 200 µs. Keysight later implemented its fast Fourier transform (FFT) data acquisition mode in its M9391A PXIe vector signal analyzer (VSA). Using the FFT mode, the internal FPGA of the VSA is used to generate an FFT from the acquired data. This FFT can be used both in the measurement of the signal power for the servo loop and then, from the same acquisition data, for an Adjacent Channel Power Ratio (ACPR) measurement.

Table 1

Even greater speed improvements were realized when Keysight introduced the M9451A PXIe measurement accelerator. An FPGA-based PXIe module, the M9451A measurement accelerator clocks closed/open loop DPD and ET measurements at tens of milliseconds, providing up to a 100 times speed improvement over software-based measurements when used as part of the RF PA and FEM reference solution. The enhanced version of the reference solution enables higher throughput while maintaining highly accurate S-parameter, harmonic distortion, power and demodulation measurements. Examples of digital predistortion model extraction and application speeds are shown in Table 1. Source waveforms were 5 and 20 MHz LTE signals with a truncated waveform length of 500 µs. The “extract” time in the table represents the time to analyze the VSA measurement data and extract the DPD look-up table (LUT) coefficients. “Apply” represents the time to apply the newly predistorted signal back to the VSG.

The M9451A PXIe measurement accelerator achieves this speed through its fast Altera Stratix V FPGA and dedicated processing gateware for DPD and ET with fast peer-to-peer (P2P) data transfer to and from the PXIe VSAs and PXIe VSGs that are included in the reference solution configuration (see Figure 2). Hardware accelerated ET waveform generation is performed alongside the DPD waveform. Fast data transfer to the arbitrary waveform generator (AWG) is similarly achieved over the PXI backplane. The shaded area in Figure 2 highlights the key functions of the DPD and ET gateware in the PXIe measurement accelerator. Data cylinders represent allocated blocks of I/Q data in the M9451A memory, and rectangles represent algorithms implemented in the accelerator. Test software controls how data is processed by passing data handles associated with each data cylinder to the API method associated with each algorithm rectangle. P2P PCI Express® technology is used to achieve fast data transfers between the M9451A memory and the M9381A PXIe VSG hardware.

Figure 2

Figure 2 M9451A PXIe measurement accelerator block diagram.

The ideal reference waveform, without predistortion, is first loaded into the M9381A PXIe VSG  address resolution buffer (ARB) memory and then transferred to the M9451A using P2P. After the model extraction algorithm computes an LUT or associated coefficients, the predistorter creates a predistorted waveform in the PA I/Q cylinder. The predistorted waveform data is then transferred directly to the VSG ARB memory over PCI. The P2P PCI Express technology is also used to transfer measurement data from the M9391A or M9393A PXIe VSA hardware to the M9451A hardware. To simplify test software porting, the measurement accelerator’s application programming interface (API) is leveraged from the Keysight Signal Studio API. For example, the measurement accelerator supports the same LUT and memory order polynomial (MOP) DPD methods, operated in either open- or closed-loop modes.

These fast test times do not come at the expense of measurement accuracy and repeatability. Keysight’s reference solution provides programming examples for test techniques to optimize repeatability and test time when making power measurements.

New PXIe Vector Transceiver Speeds Manufacturing Test

The Keysight M9420A VXT PXIe vector transceiver (VXT) aims to more than double manufacturing test throughput for PAs without increasing test system floor space. A single PXI chassis can be configured with up to four of the four-slot VXTs, or a custom system can be developed with a DIO card and one-slot VNA module.

To minimize test system development time and reduce time-to-first-measurement, the VXT can be used with the PA reference solution. The built-in servo routine accurately determines the final PA output power to control PA distortion and accurately determine whether the device is ready to ship. Traditional methods for power measurements have involved either swept or I/Q acquisitions followed by software processing. Though the software processing speed can scale with the capability of the processor, FPGA-based measurements have more recently been utilized to enhance the speed of measurements even more than what today’s processors can achieve. The VXT, with high speed PXI form factor coupled with real-time FFT processing in the FPGA, compresses total test time as shown in Table 2.

Table 2

Communications system architects, RF PA designers and test engineers attempting to improve the efficiency of PAs should consider the measurement and analysis techniques in Keysight’s RF PA/FEM reference solution. The RF PA/FEM reference solution is a combination of Keysight’s measurement hardware and measurement software. In addition to providing test methods that address the specific requirements for ET and DPD, the reference solution provides an industry-proven approach for faster test system development and test throughput from design to manufacturing. When used with Keysight’s new M9451A PXIe measurement accelerator, the reference solution delivers unprecedented performance for demanding envelope tracking and digital predistortion measurements.

Keysight Technologies
Santa Rosa, Calif.