CST_PCB_SIComputer Simulation Technology (CST) previewed the release of its new CST PCB STUDIO 2012 at DesignCon 2012.

Signal and power integrity (SI/PI) engineers working on the design of power distribution systems will benefit from the latest additions to CST PCB STUDIO (CST PCBS), the CST STUDIO SUITE tool for fast post-layout analysis.


The new CST PCBS IR-drop solver allows the quick calculation of the current distribution and voltage drop on multilayered PCBs and packages. DC analysis for off-chip power delivery systems is mandatory for high-current, low-voltage designs and the new IR-drop simulation helps SI/PI engineers to perform the adjustment of voltage regulator modules nominal output, strategic placement of lines and the early identification of problematic potential distributions. Budgeting for AC noise and system-level IR drop enables the optimization of voltage margins for every device of the PCB.


The CST PCBS PI solver, used to verify target impedance requirements, also presents a number of enhancements such as models with increased accuracy for vias and seamless decaps placement on imported PCB/package layouts. The new 3D impedance distribution plot helps engineers to visually identify problematic areas, and to study variations of the original layout.

"The EDA market's increasing importance to CST is reflected by our major product enhancements in this area. The 2012 version of CST PCB STUDIO makes a significant contribution to the EDA design flow," said Peter Thoma, Managing Director R&D, CST. "The new IR-drop solver and the numerous CST PCB STUDIO enhancements enable SI/PI engineers to verify power distribution systems efficiently and provide an excellent design environment for signal and power integrity analysis."