Articles by K.W. Kobayashi

A Low Cost, Interchip HBT Bias Regulation Approach for Low Noise, High IP3 Receiver Architectures

A 9 to 21 GHz broadband, high third-order intercept point (IP3), heterojunction bipolar transistor (HBT) balanced amplifier with monolithic current regulation and additional current regulators to accomodate a preceding high electron mobility transistor...
A Low Cost, Interchip HBT Bias Regulation Approach for Low Noise, High IP3 Receiver Architectures A 9 to 21 GHz broadband, high third-order intercept point (IP3), heterojunction bipolar transistor (HBT) balanced amplifier with monolithic current regulation is demonstrated in this article. The HBT balanced amplifier MMIC also integrates four...
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