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ARTICLES

Samsung and Cadence deliver 20 nm digital design methodology

Cadence Design Systems, Inc. and Samsung Electronics have collaborated to deliver a 20 nanometer design methodology that incorporates double patterning technology for joint customer deployment and internal test chips. The collaboration brings new process advances for mobile consumer electronics, enabling design at 20 nm and future process nodes.


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Fairchild Selects Cadence as Primary EDA Partner

Cadence Design Systems Inc. announced that Fairchild Semiconductor has named Cadence as its primary EDA partner following the signing of a multi-year agreement for key Cadence® mixed-signal technology. Fairchild selected Cadence for its proven ability to provide an interoperable, mixed-signal design and verification solution using Cadence Virtuoso®, Encounter®, Incisive®...
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