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Beyond the 1GHz Barrier with Thick-Film Ceramic

Using a ceramic multichip module to achieve high frequency performance beyond what is capable in a printed circuit board

Beyond the 1 GHz Barrier with Thick-film Ceramic

Daniel I. Amey and Samuel J. Horowitz
DuPont Electronic Materials
Research Triangle Park, NC

Stephen Sekel
Tektronix Inc.
Beaverton, OR

Jeff Powell and Brian Durwood
Maxtek Components Corp.
Beaverton, OR

Design challenges change at frequencies beyond 1 GHz. Circuits begin to exhibit unwanted characteristics due to parasitic inductance and capacitance, and transmission line effects caused by layout and component physics have conspired to link speed and power. Thus, high frequency circuits are more demanding thermally than their slower cousins. Traditional printed circuit board (PCB) solutions may increase substrate geometries and exacerbate the problem.

An often overlooked solution is a ceramic multichip module (MCM-C), which often can achieve high frequency performance beyond what is capable in a PCB by reducing line lengths and component size, thereby achieving electrical performance goals, including the requisite improvements in thermal dissipation and environmental performance. This article explains the problems encountered with certain types of PCB-based designs operating beyond 1 GHz, traditional PCB solutions and ceramic alternatives. A high frequency, low input capacitance differential probe MCM-C application also is discussed.

Many fundamental Ohm's law problems that will not show up in simulations occur beyond 1 GHz. These problems can be troublesome for an engineer crossing this threshold for the first time. For example, as frequency increases, wavelength decreases and the physical dimensions of discrete components (resistors, capacitors and inductors) approach a significant portion of a wavelength. As a rule of thumb, problems occur when electrical components' physical dimensions approach 0.1 to 0.2 times wavelength. For example, if a trim pot is being used, it may become a transmission line as frequency increases. Another problem is parasitic effects (independent of transmission line effects). Inductance and capacitance increase as device geometry increases. More simply put, changing from 0804-type to 0402-type passive components also changes the device spacing, line geometry and, hence, inductance and capacitance. Passive value interdependence is another problem encountered in these designs. Transmission line and parasitic effects combine to make independent resistor, inductor and capacitor (RLC) elements become frequency-dependent RLC networks. Because thick film is smaller, these effects are minimized.

Comparing PCB to Ceramic Solutions

Passive component density is dependent on the design. Thick-film MCM and PCB design rules are comparable, and line width and pitches are similar. However, in many cases, printed thick-film component (resistors and capacitors) density can be higher than equivalent surface-mount device (SMD) density. In the ceramic solution, area does not need to be devoted to end termination solder areas and pick-and-place machine spacing limitations. Space savings can be achieved by placing components over integral or printed passives. In addition, thick-film laser-trimmed adjustable RLC elements are almost always smaller (not to mention, more accurate) than their mechanically adjustable counterparts or nonadjustable passives with inline trim pots.

IC performance can be optimized by eliminating the packaging. Chip and wire technology on thick-film ceramic exhibits some density, thermal and electrical performance advantages. Chip and wire construction eliminates die packages and interconnects, minimizing parasitics and junction temperature by mounting the die to the substrate directly with no intervening package or gap. Typically, a smaller footprint enables more dense component placement, reducing line length effects and possibly increasing speed. It should be noted that although flip-chip and chip-scale packaging may narrow the performance and density gaps, they are not yet in widespread use.

Thermal expansion stress and mechanical stability are enhanced since the coefficient of thermal expansion (CTE) of silicon is a closer match to ceramic substrates than PCBs, although some variances over temperature and other conditions exist. Table 1 lists the comparable CTE values between various substrates.

Table I

Typical CTE


CTE (ppm/o C)









x,y axes
z axis

60 to 80

Thermal conductivity of an MCM-C substrate is many times that of a PCB. Resistors printed on ceramic and die attached to ceramic directly present a more direct thermal conduit. Elimination of the device package and the attendant reduction of thermal impedance combined with a 30 to 500 times increase in substrate thermal conductivity can be the difference between success and failure, and contributes materially to IC reliability and longevity. Table 2 lists the typical thermal conductivity of some common PCB and substrate materials

Table II

Typical Thermal Conductivity


Typical Thermal
Conductivity (W/mK)

FR4 and similar

0.2 to 0.5


16 to 19


70 to 200




0.44 to 2.20

Precision resistance adjustments are performed with a laser on ceramic, compared to trim pots on PCBs. Thick-film circuit elements on ceramic can be either passively or actively laser trimmed. Passive trimming adjusts resistive, capacitive or inductive elements to a specific value. Active trimming adjusts these elements for specific circuit performance, including gain, offset, frequency response and total harmonic distortion. Typically, these adjustable elements are smaller than their SMD counterparts, resulting in better high frequency (minimum parasitic and transmission line effects) performance and permitting module sizes that may not be obtainable otherwise. A precision of 0.1 percent is possible. Appendix A presents a PCB vs. MCM-C comparison matrix.

A Design Example
Recently, Tektronix released the model P6247 extremely low input capacitance differential active probe. The unit operates with a bandwidth above 1 GHz in a space measuring the size of a couple of paper clips, as shown in Figure 1 . The probe design is suited to MCM-C technology because the electrical, physical and thermal requirements are demanding and interdependent. The high performance characteristics of the probe would be impossible to obtain from a printed circuit implementation.

In comparing the ceramic chip-on-substrate technique vs. standard PCB probe construction, the wide bandwidth cannot be achieved easily using a PCB due to the need for relatively large mechanically adjustable resistors and capacitors required to adjust the common-mode rejection ratio (CMRR) performance. These large components with their undesirable parasitics would limit the probe's bandwidth and CMRR performance, whereas the ceramic approach utilizes much smaller component geometries and direct die mounting, minimizing component and package parasitics. The high CMRR requirement is achieved as a result of the small, lower parasitic active laser-trimmable resistors and capacitors used on the ceramic substrate.

In addition, the probe's low input capacitance requirement (< 1 pF) is difficult to achieve with standard PCB construction because the larger discrete passive components have higher capacitance, whereas the ceramic version's smaller, laser-adjusted capacitors have much lower residual capacitance. The probe's IC also is required to dissipate 0.8 W, which is a problem for a PCB's poor thermal conductivity (0.2 to 0.5 W/mK). The higher thermal conductivity of the ceramic substrate (16 to 19 W/mK) decreases the IC's junction temperature significantly.

The differential active probe's small, hand-held size offers an ergonomic advantage. Using PCB construction with SMT components increases the probe's target size substantially. The current ceramic version utilizes printed passive components on both sides of the substrate, providing a smaller footprint and minimal z-axis impact.

To achieve high CMRR in a differential probe, the attenuation of the differential plus and minus paths must match accurately. Figure 2 shows a schematic diagram of the probe's circuit. The ideal condition is: R1/R11 = R2/R22 and C11/C1 = C22/C2. Resistor and capacitor values must be ratioed accurately to achieve a 40 (1:100) to 60 dB (1:1000) CMRR and all parasitic contributions must be equally small. With eight resistor and capacitor elements that can be trimmed functionally, thick film offers many advantages over its manually adjusted counterparts. Resistor trim techniques that maintain both electrical and physical ratios ensure that the CMRR is maintained over a wide frequency range. Unequal self heating within the attenuators degrades the ratio matching due to temperature coefficient effects in the resistors and capacitors. The thermal conductivity of the substrate minimizes these effects quickly by dissipating any localized heating throughout the entire attenuator network. Once laser trimmed, the ratio matching of the attenuator pair is not subject to misadjustment from physical shock as trim pots are. This factor is important in a small probe head, which is jarred routinely in normal handling on the bench.

The Design Procedure
The step-by-step ceramic design begins by using any standard layout tool and converting to MCM-C rules through a tool proprietary to a given MCM house with its unique process-specific models. The modeling, simulation and iteration are executed on tools similar to those used for PCBs. Typically, basic modeling is a SPICE derivative. Modules with RF issues usually are modeled using a tool such as Supercompact.™

Simulations using finite-element analyses are used to predict thermal dissipation through the MCM and the flow of heat through the system. This thermal analysis enables the designer to predict junction temperatures and other criteria early enough to adapt the MCM to alternate thermal management mechanisms if required. Iterations can be expected. Fortunately, iterations with thick film typically entail modifying the phototool and creating a new screen, which is a simple and inexpensive process.

Development of test and trim procedures is performed in conjunction with thedesign. Component values can be somewhat looser in that they can be trimmed to meet electrical parameters as a final manufacturing step. The process of how a laser is used to trim the circuit step response is shown in Figure 3 . Any or all passive elements can be adjustable.

MCM-C Examples
Etching of thick-film metallization has been used in high frequency applications for a number of years, primarily in military applications. With the new emerging high frequency wireless applications, the process is now recognized as offering functional, cost and performance advantages over the more costly thin-film metallizing and/or expensive filled polytetraflouroethylene (PTFE) laminate materials. The process combines conventional screen printing with photoresist patterning and etching. The screen printing/photoresist/etching process produces conductor traces with smooth, flat surface topology, and well-defined and near-vertical edges. The technology produces 0.001" lines and spaces on substrates as large as 4" x 4". Applications converted from thin film have achieved 35 to 55 percent cost savings while applications converted from conventional screen printing have demonstrated a two- to three-times increase in circuit density, allowing more functions per circuit or more circuits per substrate for lower cost.

Fodel® materials incorporate photosensitive polymers in the thick-film multilayer materials. Dielectric or conductor circuit features are formed using ultraviolet (UV) light exposure through a phototool and development in an aqueous process. Fodel dielectrics can be patterned with 75 mm vias on 125 mm pitch and Fodel conductors can be patterned with 50 mm lines on 100 mm pitch with smooth, well-defined, near-vertical edge features. Figure 4 shows the Fodel photo patterning process.

Another example of this technology is Green Tape.TM Low temperature cofired ceramic technology uses thick-film dielectric materials in tape form instead of as screen-printable dielectric paste. The dielectric tape is blanked to size and registration holes are punched. Vias are formed in the dielectric tape by punching or drilling and conductor lines are screen printed on the tape. When all layers have been punched and printed, the tape layers are registered, laminated and cofired. Circuits with over 50 layers have been demonstrated, a layer capability much greater than other ceramic processes. Because the cofire process involves fewer firing steps and allows inspection of punched printed layers prior to lamination, it exhibits higher final yield than sequential processes. Green Tape is capable of designs with 125 mm conductors with 125 mm spaces and 125 mm diameter vias on a 250 mm pitch.

Each of these advanced technologies offers cost and performance improvementsover the more conventional technologies in use currently for high frequency interconnections. Figure 5 shows test results comparing the attenuation of a 50 W microstrip circuit using a Fodel multilayer dielectric and conductor, etched gold on 96 percent alumina, 951 Green Tape and FR4 PCB.

MCM-C offers a possible solution for applications where careful control of signal integrity or thermal management may make the difference between success and failure. In the future, new variants on MCM-C will enable designs well beyond 1 GHz.

Supercompact is a product of HP-EEsof, Santa Rosa, CA. Fodel is a product of DuPont Electronic Materials, Research Triangle Park, NC.

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