Layout Techniques for Integrated Circuit Designers
by Mikael Sahrling

The title of this book is a good representation of what it is. It is a comprehensive guide to what you need to know to lay out and design Si ICs. It provides plenty of background information to understand the hows and whys of circuit layout. This includes not only circuit considerations but also the underlying process constraints that drive layout requirements. If you are a Si circuit designer, this is a good reference for you.

It is worth noting what this book is not. This is a Si design and layout book, so while there is information on GaN, GaAs and InP, this is not a useful guide for laying out designs in those technologies. The book’s primary focus is on CMOS technologies and it includes plenty of content on BiCMOS and SiGe theory and layout. This also is not a manual for how to push polygons in your favorite layout tool. “Layout Techniques for Integrated Circuit Designers” goes much deeper than that.

In addition to providing underlying insights and practical guidance for the layout of Si designs, there are ample examples. The book has two parts; Part 1 focuses on how Si ICs are manufactured and how elements are laid out. Part 2 covers layout functions, including how the layout is done and structured, design verification, layout versus schematic and design rule checking. There are lots of Python examples in the book and even better, there are more available in a downloadable text file.

If you are an engineer that is about to embark on a Si design, “Layout Techniques for Integrated Circuit Designers” will give you plenty of understanding and guidance. Even if you are experienced in Si design techniques, Mikael Sahrling’s book is a useful reference.

Review by: Fred Schindler
Engineering Consulting Services 

ISBN 13:  978-1-63081-910-1  

Published: August 31, 2022

Pages: 463 pp.

To order this book, contact:

Artech House
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Norwood, MA 02062
800-225-9977
or
16 Sussex St.
London, SW1V 4RW, UK
+44 (0)20 7596 8750