Cobham Gaisler announced today the release of a new Instruction Simulator for radiation hardened processors. The TSIM3-GR716, the first version in a family of new TSIM3 Instruction Simulators, is used during software verification and validation development phases, providing extended debugging and analysis facilities not available working with hardware, such as an indefinite number of watchpoints, unlimited instruction and bus trace lengths, as well as non-intrusive profiling and code coverage. Cobham’s TSIM3 is an attractive alternative when the actual hardware is not yet available to software developers. In addition, the TSIM3 Instruction Simulator also offers an environment suitable for automated testing, which is useful during regression testing.
Cobham’s TSIM3-GR716 Instruction Simulator is targeted towards software applications developers and system engineers conducting performance evaluations and system level simulations of equipment utilizing the company’s GR716 radiation-hard microcontroller. Cobham’s GR716 LEON3FT Fault-Tolerant Microcontroller is a complex mixed-signal system-on-chip device which implements a plethora of digital and analogue interface. The GR716 devices are currently available in prototype quality, together with several types of development boards, with flight devices expected for the end of 2020. The development of the GR716 Microcontroller has been funded by the European Space Agency (ESA) and is part of Cobham’s broad portfolio of microcontrollers.
“We are very excited to bring this new instruction simulator product to the market. Cobham’s TSIM3 combines the best of our existing TSIM2 and GRSIM simulators into a single product. As has been with our previous instruction simulators, TSIM3 implements precise simulation of the radiation-hard devices that we develop. We have consciously chosen to prioritize accuracy over simulation speed,” said Daniel Hellström, Head of Software, Cobham Gaisler. "The first release of our TSIM3 has been focused on the support of the new GR716 microcontroller device. The GR716 has a new architecture with tightly coupled local memory and complex DMA transfers with built-in atomic operations which were not possible to model with TSIM2. The mixed-signal GR716 is one of our most complex system-on-chip designs, which is why we chose it for the initial release of the TSIM3 simulator.”
The TSIM3 Instruction Simulator will replace the existing TSIM2 single-core and the GRSIM Multi-Core Simulators. The initial release of TSIM3 only supports the single-core LEON3FT processor implemented in the radiation-hard GR716 LEON3FT Fault-Tolerant Microcontroller. The release of the TSIM3 with support for multi-core simulation is expected later this year, supporting Cobham’s dual-core LEON3FT GR712RC and quad-core LEON4FT GR740 processors.
Cobham’s TSIM3-GR716 Instruction Simulator provides unique capabilities like to the software developers, like being able to execute unmodified GR716 binaries, providing cycle-true execution to allow worst-case analysis, models tailored to GR716 specifics both in terms of processor model and peripheral models, to boot the processor using all boot configurations (apart from I2C and SpaceWire remote access), implementing specific IO models. With 100% real-time performance for the GR716 microcontroller when operating at 50 MHz, the TSIM3 is also suitable for operations level simulation, where real-time performance is needed. The TSIM3 Instruction Simulator also offers automation through Tcl and is highly extensible. The instruction and on-chip bus traces provide unlimited lengths, allowing tracing of long simulations. Cobham’s TSIM3-GR716 also models the two CAN interfaces in the GR716 device.
For more information about Cobham’s processor and software products, please visit www.cobham.com/Gaisler