Digital Baseband Simulation in Design Verification

Elektrobit Ltd.
Oulu, Finland

Time to market and time to volume play an essential role in the competitive environment of today’s wireless communication business. One of the most important elements enabling well-managed product launches is systematic design verification in all phases of product development with the quickest possible feedback from testing to design. The cost of design flaws to product development in terms of missed schedule for product launch, reduced profit margins and resources needed for corrective actions depends on the design phase where the flaw is detected -- the earlier the flaw is detected, the less expensive it is to fix. In the case of developing key components, such as chipsets, these elements become even more important to emerging high volume, highly competitive markets like the approaching third-generation (3G) mobile system. The most important strategic design decisions are usually made at a very early phase and have a dramatic impact on the rest of the design process. Consequently, the role of baseband signal processing is constantly growing in wireless system design.

One of the most critical parameters for measuring wireless communication system performance is the relationship between bit error rate (BER) and signal-to-noise ratio (S/N). Since BER is highly dependent on radio channel characteristics such as fading, Doppler effects and the number of multipath components, it is important to use a realistic radio channel when evaluating which design option will work best in a real end-user situation. Radio channel simulators, also known as multipath fading simulators, are commonly used to generate this realistic environment in laboratory conditions. Traditionally, these tests have been conducted at RF or sometimes at analog baseband levels.

The PROPSim DBB digital baseband radio channel simulator introduces new possibilities for performing such tests already at digital baseband level. Additional benefits include the capability to test algorithms against a realistic channel without any hardware, the ability to reveal design errors in the pre-application-specific IC (ASIC) phase and the option to skip the macromodel design phase.

The simulator can be configured for one or two channels and is capable of generating up to 312 independent fading paths. Both realistic channel models and standardized test cases can be used. The standard product includes two channel-modeling software packages for creating static or dynamic user-defined channel models. The use of real measured channel data also is possible.

The new simulator generates fully dynamic channels (represented by smoothly sliding delays), which make it particularly useful for testing advanced features in 3G mobile and fourth-generation (4G) experimental systems such as RAKE receiver finger tracking and allocation. 3G Partnership Project channel models are available on CD-ROM.

A Modern Design Cycle
Fig. 1  Development phases in digital wireless communication systems A typical product development process of digital wireless communication systems can be broken down into general phases, as shown in Figure 1 . These phases include software-based algorithm development and performance tests, hardware emulation engine-based validation and performance tests, and prototype development-based performance tests in the analog baseband and RF domains. The digital baseband radio channel simulator enables performance tests in a realistic environment during the first two steps of the design verification cycle.

Fig. 2  The use of a channel simulator in different phases of wireless design verification. As shown in Figure 2 , decisions made during the methods and algorithm design phase are usually the most important because they affect the remainder of the product development cycle. Pressure to shorten the product development cycle requires advanced testing to be started at an earlier phase, which means moving more and more testing toward baseband signal processing. Realistic channel simulation at this stage gives the designer a new tool with which to compare different algorithms and methods under various conditions and boost the selection process. Using a digital baseband simulator together with a hardware emulation engine improves the possibilities of revealing design errors in the pre-ASIC phase. Advanced systematic design verification helps to achieve better overall quality and lower the cost of the total design. In all of these cases, testing results can be immediately fed back to the design process for possible corrective actions as opposed to the significant delay often experienced in the traditional design verification process due to limited testing possibilities.

At the system level, the digital baseband radio channel simulator can render unnecessary the building of dedicated hardware test benches to test system-level functions of the design. Instead of trial and error, design verification can be accomplished with the digital baseband simulator and a workstation or PC. The simulator provides the user with realistic information on the design characteristics at the moment when the major design decisions are made. This capability significantly reduces the risk of having to redesign the ASIC at a later stage.

Simulation with the Digital Baseband Simulator

The PROPSim DBB digital baseband channel simulator provides a 10-bit in-phase and quadrature (I&Q) input and 12-bit I&Q output, and uses an external clock for scaling the simulation speed. In a real-time simulation the clock provides the signal sampling frequency; in semi-real-time simulation it can be a slower user-defined clock frequency.

In traditional RF-fading simulators it has been up to the simulator equipment manufacturer to choose the sample rate for the data that are fed into the simulator -- assuming that the simulator implementation is digital. However, with the digital baseband simulator the end user is free to choose any sample frequency necessary to perform the simulation. This capability is very challenging to the channel-modeling tools since the modeling software typically maintains a very close relationship to simulator hardware. PROPSim DBB channel-modeling software is capable of handling these signal sample scaling issues in a flexible way.

Fig. 3 Real-time and semi-real-time signals. Semi-real-time simulation is required in software simulation and hardware emulation environments due to the relatively slow speed of the simulation and emulation hardware. The PROPSim DBB simulator can be used to accelerate this process by assuming the load of simulating the radio channel. Although the simulation is slowed down, all of the samples from the original sampling frequency are run through the simulator. This downscaling of signal speed is shown in Figure 3 .

The ever-increasing competition in the wireless communications business and the proliferation of wireless systems and products to new applications have put considerable pressure on wireless system developers to reduce the time to market and time to volume of new products. Companies developing products for new high volume markets, such as the emerging 3G market, are especially faced with these requirements. This need represents challenges to develop new, improved test procedures and to start advanced systematic design verification at the earliest possible phase of product development.

The PROPSim DBB digital baseband radio channel simulator introduces new possibilities for testing wireless system designs in realistic, dynamic multipath fading environments in the digital domain prior to hardware development. It fills the gap between testing in the early design phase and the system integration phase. In addition, the simulator facilitates immediate feedback from testing at the earliest possible phase when fixing design errors is least expensive and design decisions have the most significant effect on subsequent phases.

The new PROPSim DBB digital baseband radio channel simulator also enables performance tests of methods and algorithms against a realistic channel environment and reveals design errors in the pre-ASIC phase. Advanced performance tests at an early design phase may also provide the opportunity to skip the macromodel design phase. The new simulator can be integrated into a software simulation environment or operated in conjunction with a hardware emulation engine. It can be configured with one or two channels and is capable of simulating up to 312 independent fading paths. The simulator generates smoothly sliding delays, which make it particularly useful for testing advanced systems including 3G mobile and 4G experimental systems. Additional information can be obtained from the company’s Web site at

Elektrobit Ltd., Oulu, Finland +358-400-308-396.