A Transceiver Chipset for 2.4 GHz Direct Sequence Spread Spectrum Applications

RF Micro Devices
Greensboro, NC

The 2.4 GHz industrial, scientific and medical (ISM) band is coming of age, largely due to the coincidental emergence of three wireless local area network (LAN) standards. However, there are still relatively few products designed for this band that offer an attractive combination of performance, size and cost.

Wireless LAN systems have been hyped for many years with very limited success, but there are encouraging signs that this market will finally emerge. The segmentation of this market is still unclear since some of the standards appear to overlap. For example, the Home RF Working Group's shared wireless access protocol (SWAP) specification calls for 800 kbps and 1.6 Mbps data rates, while Bluetooth radios provide 1 Mbps with hopes to move to 2 Mbps later. The first IEEE802.11 wireless LAN specification was ratified in 1997 with a 2 Mbps maximum data rate but is quickly moving on to an 11 Mbps standard, a speed that clearly differentiates it from other alternatives. For the first time, a wireless LAN offers performance competitive with existing wired systems.

What will finally enable the market is the right combination of data rate and price. The existence of the 11 Mbps IEEE standard is a key step; however, the cost of a wireless LAN radio is still too high and will inhibit market growth. While wireless LANs will remain more costly than Ethernet hardwire networking, it is clear that, in many applications, mobility has great value.

The model RF2938 RF/IF transceiver IC forms the core of the wireless LAN radio design and offers high performance, low power and high integration at a cost that makes discrete designs inefficient and other integrated approaches expensive by comparison. Other applications, such as wireless modems and wireless local loop (WLL), will also benefit from the versatility and integration level of the RF2938 IC.

An IEEE802.11 Chipset

Figure 1 shows a high performance, low cost, IEEE802.11-compliant transceiver chipset designed for direct sequence spread spectrum (DSSS) communication in the 2.4 GHz ISM band. The RF2938 transceiver IC is designed using a state-of-the-art 24 GHz BiCMOS process and utilizes a single conversion architecture to optimize the system performance/cost trade-off. In half-duplex mode, the RF2938 IC saves the cost of one IF surface acoustic wave (SAW) filter by switching a single filter between RX and TX modes. Full- duplex mode is also available.

Linear amplifiers and 95 dB of gain control are used in the RX signal path to preserve signal amplitude, however, internal high speed comparators also offer data-sliced digital outputs. The TX signal path has 15 dB of gain control to make the chipset more flexible, allowing the system designer to choose filters with various insertion losses. A 6 dBm power amplifier (PA) driver is integrated that can drive an antenna directly or drive various highly efficient GaAs heterojunction bipolar transistor (HBT) PAs, which can deliver 1 W of power.

The chipset was designed specifically for an IEEE802.11-compliant DSSS system using biphase-shift keying (BPSK), quadrature phase-shift keying (QPSK) or the complementary code keying (CCK) modulation scheme proposed for the 11 Mbps standard but, with built-in flexibility, it can be used for many other applications and is not confined to the 2.4 GHz band. Flexible features include a broad IF range (45 to 500 MHz) and user-programmable baseband filters (from 1 to 35 MHz). In short-range applications, the +6 dBm of RF power available at the output may avoid the need for an external RF power amplifier.

Signal Path

The front end of the receive signal path starts with a 2 dB noise figure low noise amplifier (LNA). An N-type MOS (NMOS) p-attenuator is placed directly after the LNA and either passes the signal or attenuates it by 15 dB. The signal moves off chip to the image filter then back on to the mixer, which is a double-balanced differential mixer with an additional pre-amplifier at its input that boosts gain and improves noise figure.

The choice of IF ranges from 45 to 500 MHz should allow the system designer to select from a wide range of available SAW filters. The IF automatic gain control (AGC) amplifiers have 50 dB of gain range and the baseband AGC amplifiers have another 30 dB of gain range, providing a total of 80 dB of gain range controlled by a single pin. Adding in the 15 dB gain step in the LNA yields 95 dB of total gain variation. Separating the gain between the IF and baseband frequencies adds frequency diversity to the system, which reduces the chance of instabilities and improves power supply rejection.

The baseband signal path also has four programmable lowpass filters (LPF) (I and Q in RX and TX). The internal LPFs are active gmCs, which realize a five-pole Bessel filter. A Bessel filter was chosen as the optimum filter type for data systems due to the flat passband group delay and excellent step response. The 3 dB corner for these four filters ranges from 1 to 35 MHz, and all are programmed simultaneously by a single external resistor.

The linear, filtered baseband outputs of the RX signal paths are also fed into a data slicer, which gives out CMOS levels. These data slicers can be independently disabled if the analog outputs only are desired. The TX signal path starts by lowpass filtering the input bits with the five-pole gmC Bessel filter. The signal is then upconverted to IF and the I and Q channels are combined and moved off chip to the external SAW filter. The IF signal is then amplified prior to upconverting to RF. This amplifier provides 15 dB of variable gain to allow correction for all the various IF and RF filter losses. This gain also may be adjusted in real time if necessary. Finally, the RF signal is boosted to 6 dBm prior to going off chip to one of the GaAs HBT PAs.

The Receiver

RX Front End

The RF2444 contains the RX front-end LNA/mixer for this chipset. The LNA comprises two stages: a common emitter amplifier stage with 13 dB power gain and an NMOS p-attenuator that has an insertion loss of 3 dB in the high gain mode and 17 dB in the low gain mode. The attenuator was placed after the LNA so that system noise figure degradation would be minimized. A single gain stage was used prior to the image filter to maximize the third-order intercept point (IP3), which minimizes the risk of large out-of-band signals jamming the desired signal. The LNA + attenuator noise figure is 2.3 dB and the input IP3 is -6 dBm in the high gain mode. Table 1 lists key specifications for the RF2444 LNA/mixer.

Table I
RF2444 LNA/Mixer Key Specifications

Noise figure (dB)


IF range (MHz)

45 to 500

Gain settings (dB)

25 to 10

Cascaded noise figure (high gain) (dB)


Supply voltage (V DC)

2.7 to 3.6

Current consumption (mA)



16-pin SSOP

The mixer on the RF2444 also comprises two stages. The first stage is a common emitter amplifier used to boost the total power gain prior to the lossy SAW filter. This stage also converts the single-ended signal to differential and improves the noise figure of the mixer. The second stage is a double-balanced mixer whose output is differential open collector. It is recommended that a current combiner is used (as shown in Figure 2 ) at the mixer output to maximize conversion gain, but other loads also can be used. The current combiner is used to perform a differential-to-single-ended conversion for the SAW filter. C1, C2 and L1 are used to tune the circuit for a specific IF. L2 is a choke to supply DC current to the mixer and also can be used as a tuning element, along with C3, if necessary. The conversion gain of this mixer is

Power Conversion Gain (dB) =  10log10 (R1) - 11 dB

The mixer power conversion gain is +19 dB when R1 is set to 1 kW. The conversion gain can be adjusted up » 5 dB or down » 7 dB by changing the value of R1. Once R1 is chosen, L2 and C3 can be used to tune the output for the SAW filter. The mixer cascade single-sideband (SSB) noise figure is 10 dB and IIP3 is -18 dBm.

The cascade power gain of the LNA/mixer is 29 dB. After the insertion loss in the image filter (» 3 dB) and IF SAW filter (» 10 dB), there is still 16 dB of gain prior to the IF amplifiers so the 5 dB noise figure of the IF amplifiers should not significantly degrade system noise figure.


The front end of the IF AGC starts with a single-ended input and a constant gain amplifier of 15 dB. This first amplifier stage sets the noise figure and input impedance of the IF section, and its output is taken differentially. The rest of the signal path is differential until the final baseband output, which is converted back to single ended. Following the front-end amplifier are multiple stages of variable gain differential amplifiers giving the IF signal path a gain range of 0 to 50 dB. The noise figure (in maximum gain mode) of the IF amplifiers is 5 dB, which should minimally degrade the system noise figure. The IIP3 of the IF amplifiers is -68 dBm in maximum gain mode, and -8 dBm at minimum gain.

The IF-to-baseband mixers are double balanced, differential in, differential out types with 0 dB conversion gain. The LO for each of these mixers is shifted 90° so that the I and Q signals are separated in the mixers.

RX Baseband Amplifiers, Filters, Data Slicers and DC Feedback

At baseband frequency, multiple AGC amplifiers offer a gain range of 0 to 30 dB. Following these amplifiers are fully integrated gmC lowpass filters to further filter out-of-band signals and spurs that get through the SAW filter, anti-alias the signal prior to the analog-to-digital converter and band limit the signal and noise to achieve optimal signal-to-noise ratio. The 3 dB cutoff frequency of these LPFs is programmable with a single external resistor and continuously variable from 1 to 35 MHz. A five-pole, Bessel-type filter response was chosen because it is optimal for data systems due to its flat delay response and clean step response. Butterworth- and Chebyshev-type filters ring when given a step input, making them less ideal for data systems.

The filter outputs drive the linear 500 mV p-p signal off chip, but also connect internally to a data slicer that squares up the signal to CMOS levels and drives this data signal off chip. This data slicer is a high speed CMOS comparator with 30 mV of hysteresis and self-aligned input DC offset. It can be independently disabled if only the linear outputs are desired.

DC feedback is built into the baseband amplifier section to correct for input offsets. Large DC offsets can arise when a mixer LO leaks to the mixer input and then mixes with itself. DC offsets also can result from random transistor mismatches. A large external capacitor is needed for the DC feedback to set the highpass cutoff, and this capacitor is re-used to set the DC input level for the self-aligned data slicer.

The receive signal path also has a received signal strength indicator (RSSI) output, which is the sum of both the I and Q channels. The RSSI has approximately 70 dB of dynamic range. Table 2 lists key features of the RF2938 transceiver IC.

Table II
RF2938 Transciever IC Key Features

IF (MHz)

45 to 500

Programmable baseband filters (MHz)

1 to 35

Cascaded Rx gain (dB)

to 90


small 48-pin

Supply voltage (V DC)


Single IF SAW filter for half-duplex mode

RF amplifier to 6 dBm (linear)

LO Input Buffers

RF LO Buffer

The RF LO input has a limiting amplifier before the mixer on both the RF2444 (RX) and RF2938 (TX). This limiting amplifier design and layout are identical on both ICs, which will make the input impedance the same as well. Having this amplifier located between the VCO and mixer minimizes any reverse effect the mixer has on the VCO, expands the range of acceptable LO input levels and holds the LO input impedance constant when switching between RX and TX. The LO input power range is -18 to +5 dBm, which should make it easy to interface to any VCO and frequency synthesizer.

IF LO Buffer

The IF LO input has a limiting amplifier before the phase-splitting network to amplify the signal and help isolate the VCO from the IC. In addition, the LO input signal must be twice the desired IF. This requirement simplifies the quadrature network and helps reduce the LO leakage onto the RX_IF input pin (since the LO input is now at a different frequency than the IF). The amplitude of this input must be between -15 and 0 dBm. Figure 3 shows a block diagram of the RF2938 transceiver IC in half-duplex mode.


TX LPF and Mixers

The transmit section starts with a pair of five-pole Bessel filters identical to the filters in the receive section and with the same 3 dB frequency. These filters pre-shape and band limit the digital or analog input signals prior to the first upconversion to IF. These filters have a high input impedance and expect an input signal of 200 mV p-p (typ). Following these LPFs are the I/Q quadrature upconverter mixers. Each of these mixers is half the size and half the current of the RF-to-IF downconverter on the RF2444 IC. Recall that this upconverted signal may drive the same SAW filter (in half-duplex mode) as the RF2444 and, therefore, share the same load. Having the sum of the two baseband-to-IF mixers equal in size and DC current as the RF-to-IF mixer minimizes the time required to switch between RX and TX and facilitates the best impedance match to the filter.

TX Variable Gain Amplifier

The AGC after the SAW filter starts with a switch and a constant gain amplifier of 15 dB, which is identical to the circuitry on the receive IF AGC. This configuration was used (similar to the RX signal path) so that the input impedance remains constant for different TX gain control voltages. Following this 15 dB gain amplifier is a single stage of gain control offering 15 dB gain range. The main purpose of adding this variable gain is to give the system the flexibility to use different SAW filters and image filters with different insertion loss values. This gain also could be adjusted in real time if desired.

TX Upconverter

The IF-to-RF upconverter is a double-balanced differential mixer with a differential-to-single-ended converter on the output to supply 0 dBm peak linear power to the image filter. The upconverted SSB signal should have -6 dBm power at this point, and the image will have the same power. However, due to the correlated nature of the signal and image, the output must support 0 dBm of linear power to maintain linearly.

+6 dBm PA Driver

The SSB output of the upconverter is -6 dBm of linear power. The image filter has at most 4 dB of insertion loss while removing the image, LO, 2LO and any other spurs. The filter output supplies -10 dBm of input power to the PA driver.

The PA driver is a two-stage class A amplifier with 10 dB gain per stage, is capable of delivering 6 dBm of linear power to a 50 W load and has a 1 dB compression point of 12 dBm. For lower power applications, this PA driver can be used to drive a 50 W antenna directly.

The Power Amplifiers

There are currently several PAs for the 2.4 GHz band designed in the GaAs HBT fabrication facility. Since the RF2938 provides up to +10 dBm, not much more gain is required to achieve the +20 dBm for wireless LAN systems, and the RF2126 chip is a suitable choice. Offering 45 percent power-added efficiency at Vcc = 3.6 V, the RF2126 PA typically draws less than 200 mA at +20 dBm, though it can provide up to +30 dBm if required. The IC is supplied in a PSOP-8 package, which provides good thermal characteristics as well as a low inductance ground.

IC Packages

The RF2938, RF2444 and RF2126 ICs are supplied in new exposed dieflag packages. The dieflag is exposed on the bottom side of the package, which allows it to be soldered directly to the PCB. The use of this package has two major advantages: The thermal impedance of the package is greatly improved so that the junction temperature stays cooler. Thermal impedance improvements of 2¥ to 4¥ are not unusual. Though neither design needs this extra thermal conduction to operate properly, having more temperature control improves performance. In addition, the dieflag makes a very low inductance ground, which is very important for low power RF circuitry. The pads on the IC can be bonded directly to the dieflag, providing as many low impedance grounds as desired. Package pins are not required to be designated as grounds so they can be used for signals instead, thereby allowing more functionality in 16 pins than before. Each bondwire to ground has < 1 nH of inductance, and the common inductance from the top of the dieflag to the PCB ground is < 50 pH. Each common emitter amplifier (LNAs and PAs) and each section of circuitry has its own ground, thereby minimizing crosstalk between bondwires and circuit elements. This grounding capability is especially critical for 2.4 GHz signals, but is also important for the IFs since they can reach 500 MHz for this chipset.


The RF2938, RF2444 and RF2126 ICs provide a high performance solution to a 2.4 GHz design, reducing the cost significantly without sacrificing versatility. All devices are monolithic and manufactured on high volume lines, allowing a low cost solution (less than $15 in high volume). Samples and evaluation boards for all products are available, and a complete 2.4 GHz transceiver reference design is expected to be available later this year.

RF Micro Devices,
Greensboro, NC
(336) 664-1233.