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The wireless revolution that brought smart phones and Wi-Fi-enabled everything to consumers is largely thanks to our community of RF/microwave engineers as well as NI AWR software. NI AWR Design Environment™ – Microwave Office, Visual System Simulator™ (VSS), Analog Office, AXIEM and Analyst™ – is what RF and microwave engineers use to design wireless products, from base stations to smartphones to satellite communications.

NI AWR Design Environment software accelerates the design and product development cycle of high frequency integrated circuits (IC), RF printed circuit boards (PCB), and modules, as well as the communications and radar systems found within the aerospace and defense, semiconductor, computer, consumer electronics and telecommunications markets. NI AWR reduces the time to migrate a design idea or concept to prototype and manufacturing.

NI AWR software sprang forth from the principle of enabling RF and microwave design engineers to be more productive, by empowering them with robust yet easy-to-use and intuitive tools. Today, even with the addition of more and more sophisticated features over the years, ease of use continues to be the cornerstone of every software release. The NI AWR software advantage is simple: an intuitive use model that delivers an exceptional user experience as well as an open design flow that supports best-in-class third party tools, resulting in more compelling solutions.

Figure 1

Figure 1 New load-pull formats give designers access to an extensive array of data.

V12 Emphasis on Design Flow/User Productivity

With the release of V12, the NI AWR Design Environment platform once again emphasizes user productivity by focusing on the design flow process for designers of all types of high frequency electronic components, circuits and systems. With the addition of new amplifier, antenna and radar-specific features, with expanded third-party flows for EM, stability analysis and improved DRC/LVS and multiple speed and ease-of-use improvements, V12 makes it even easier for design engineers to streamline their design process, improve end product performance and accelerate time to market.

Amplifier Design

From enhanced load-pull analysis that supports Maury SPL and CST files as well as Focus LPC files, to integrated stability analysis with AWR Connected for AMCAD STAN, V12 allows amplifier designers to view and analyze swept load-pull data more efficiently (see Figure 1).

Figure 2

Figure 2 Schematic (a) and radiation patterns (b) of a stacked circular patch with active electronic polarization diversity.

Figure 3

Figure 3 VSS phased array test bench depicting a patch antenna element (a) and its radiation and antenna pattern (b).

Load-pull simulation has been a valuable tool for the design of amplifiers for more than a decade, and recent advances in data file formats by load-pull measurement system vendors such as Maury Microwave and Focus Microwaves have significantly expanded the usefulness of load-pull characterization. These new file formats support sweeps of input power, DC bias or temperature, in addition to swept source or load impedances. The ability to visualize swept load-pull data, graphically control the sweep dimensions, and use the swept data with circuit simulation to design matching networks at fundamental and harmonic frequencies greatly speeds and simplifies the design process.

In addition to the enhancements to load-pull simulation, stability analysis has been expanded within V12 to include a connection to AMCAD Engineering’s STAN tool. Because stability can be difficult to achieve in microwave circuits with gain and nonlinear behavior, such as amplifiers and oscillators, the ability to invoke STAN directly from NI AWR Design Environment Microwave Office helps designers locate and characterize the unwanted oscillations in components such as power amplifiers. This aids the development of networks that not only improve circuit stability, but maintain the performance goals of the original circuit design.

Antenna Design

With V12 of NI AWR Design Environment, antenna designers benefit from in-situ current analysis, which shows the impact of circuits on antenna patterns (see Figure 2). Also, using real antenna data, whether EM simulated or measured, has been implemented directly within VSS for further system analysis of structures like phased arrays.

Radar Design

These new antenna design features, coupled with VSS phased-array models, within V12 of NI AWR Design Environment makes the design and development of radar systems more efficient, across a host of industries. This new release supports the simulation of phased arrays with hundreds of elements directly within VSS. Configuration of the array hardware can be done interactively using the VSS GUI, entered as equations or imported as a data file. Beam forming algorithms involving current taper, phase shift and geometry may be implemented. A typical implementation will use discrete blocks, such as power dividers, attenuators, phase shifters and amplifiers. Each block contributes to the final definition of gain and relative phase for each antenna element. The entire system can be analyzed for optimum performance, assessed for the effects of hardware impairments, and evaluated in a complete end-to-end system (see Figure 3).

Figure 4

Figure 4 New features in V12 streamline and speed EM analysis, improves overall design performance and efficiency.

Ease-of-Use, Speed and Third-Party Integration

There is more to V12 than the features noted above. Ease of use across all facets of the software platform and speed improvements to harmonic balance and electromagnetic (EM) solver technologies, as well as new and expanded third-party flows for EM and DRC/LVS, further empower users of the NI AWR Design Environment platform to streamline design flows and improve productivity.

Whether editing a schematic or layout, constructing equations, exposing a ground node within a circuit, or adding a sticky note onto a measurement graph, dozens of usability features have been added or enhanced in V12. Details of all features are available within NI AWR Design Environment “What’s New” documentation found at

A key objective for V12 was streamlining and speeding EM analysis. From EM setups to extraction flow support for Analyst to expanded 3D graphical editing and debugging, the overall efficiency of designers requiring EM analysis has been greatly improved. Additionally, new threading, adaptive mesh refinement and frequency sweep algorithms within Analyst enable designers to obtain EM simulation results even faster (see Figure 4). Tuning and optimization technique improvements inside the APLAC harmonic balance engine decrease simulation wait times even further.

AWR Connected for AMCAD, ANSYS and DWT all serve to provide designers with best-in-class design flows that can be tailored to needs and preferences. An expanded AWR Connected flow provides a seamless two-way link between ANSYS HFSS and NI AWR Design Environment, enabling designers to seamlessly tie HFSS extracted S-parameters back into NI AWR software. This expanded flow leverages the latest implementation of NI AWR Design Environment EM Socket architecture (see Figure 5), which permits users to access a broad range of third-party electromagnetic (EM) products from within the Microwave Office framework.

Figure 5

Figure 5 AWR connected flow for EM socket partners ANSYS HFSS.

AWR Connected for DWT enables seamless integration with Design Workshop Technologies’ (DWT) design rule checking (DRC) and/or layout vs. schematic (LVS) tools for PCB and module design. These new DRC/LVS flows can run one of two ways: in the DWT full view/UI mode or transparently from within Microwave Office. The DRC module performs a series of measurements to identify areas of the design that exceed preset limits for a particular manufacturing process. These design rules also ensure that the layouts will not interfere in non-permissible ways, providing a very flexible means for data selection and measurement accuracy to perform complex design rule checks. The LVS module provides designers with an efficient tool for detecting network mismatches occurring in the physical layout. It consists of a layout extractor component that outputs a netlist based on extracted hierarchical and generic devices, including their parameters and values. The LVS component compares two netlists that report errors found between the schematic netlist and the extracted netlist from the layout.

NI AWR Design Environment still holds true to its roots more than a dozen years after its first release as a design tool, delivering productivity and ease-of-use to its users. Numerous customer testimonials convey that NI AWR Design Environment  provides accurate results and a flexible framework – putting the emphasis on valuing the time of design engineers regardless of their domain of expertise, from systems to circuit or EM.

NI (formerly AWR)
El Segundo, Calif.