Analog Devices Inc. (ADI) announced ADIsimPLL™ Version 3.3, a new generation of its successful phase-locked loop (PLL) circuit design and evaluation tool. ADIsimPLL Version 3.3 assists users in evaluating, designing and troubleshooting RF systems exploiting Analog Devices’ family of PLL synthesizers and is available from ADI’s web site at free of charge.

Fully compatible with prior releases, ADIsimPLL Version 3.3 builds upon the success of previous versions of the software tool by adding support for 16 new devices, increased phase noise modeling accuracy and Fractional-N spur level estimation, along with enhancements to the tool’s New Design Wizard, Time Simulation Engine and Time Domain Simulator features. These innovative features further remove time-consuming iterations from the design process, ultimately speeding the design to market.