Hittite targets clock distribution with fanout buffer
Hittite Microwave Corp. announced the release of HMC987LP5E, a 1:9 Fanout Buffer that is ideal for low noise clock distribution in cellular infrastructure, SONET, Fibre Channel, Gigabit Ethernet and ADC/DAC applications.
The HMC987LP5E features jitter performance of 0.6 attoseconds/√Hz or 50 fs over its entire DC to 8 GHz operating frequency range. Its flexible I/O interface supports AC or DC coupling, LVPECL, LVDS, CML and is CMOS compatible. Completely configurable, the HMC987LP5E features eight differential or 16 single-ended LVPECL outputs, and one CML output with adjustable swing/power level in 3 dB steps. Integrated parallel or serial control allows users to enable or disable individual HMC987LP5E outputs to reduce power consumption when not needed. The HMC987LP5E is housed in a plastic leadless surface-mount package and provides temperature stability over the -40° to 85°C temperature range.
Also released is the HMC745LC3, which replaces the HMC745LC3C XOR/XNOR gate function. The HMC745LC3 is available in a ceramic RoHS compliant 3 x 3 mm SMT package and serves as an alternate to Inphi's 13611XR, while supporting data transmission rates up to 13 Gbps, and clock rates up to 13 GHz. The differential CML inputs to the HMC745LC3 are terminated with 50 Ohms to the positive supply and bypassed on-chip to a transmission line return signal at ground, and may be either AC or DC coupled. The differential outputs may be either AC or DC coupled. Propagation delay is typically 95 ps, while rise and fall times are 21 and 19 ps, respectively. The HMC745LC3 provides 2 ps of deterministic jitter and dissipates only 240 mW.