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Innovative Micro Technology Inc. (IMT) announced the addition of a new geometry point in its technology roadmap for Through Silicon Vias (TSV). Joining the copper-filled 15 by 60 micron depth TSV configuration that has been in production for nearly two years, IMT has been sampling its 50 by 250 micron copper-filled TSV, which is planned for production shortly after the first of the year.
Enabled to reach new system performance levels, RF applications are taking advantage of shorter signal paths achieved through vertical integration while enjoying negligible insertion loss and resistivity offered by the copper-filled TSVs. TSV integration has propagated into a host of other functions exploiting the benefits of minimized signal loss and the reduction of device footprint, the latter driven primarily by mobile applications. Complemented by wafer- and system-level assembly and packaging, TSVs are a critical element in enabling next-generation 3D integration.
While IMT offers a polysilicon TSV, recent emphasis has been placed on copper due to the material's high performance characteristics. IMT's copper-filled TSV exhibits less than 0.01 ohms of resistance and an insertion loss of 0.01 dB at 6 GHz. Responding to market demand, IMT is continuing development of metal-filled TSVs and plans to introduce TSVs with a 10:1 aspect ratio in the second half of 2011.
"There has been a steady increase in usage of our TSV technology over the last two years, initially driven by our work in the RF market," said John Foster, CEO of IMT. "More recently, interposer applications and markets such as optical and even life science have found it necessary to implement our TSVs as integration is on the rise in both areas. We have a program in production today which implements over 140,000 TSVs on a single wafer. We expect that TSV usage will continue to excel."
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