mmWave 5G networks are a high priority for operators, as the rapid growth of consumer data demand will soon outstrip the capacity of sub-6 GHz networks forcing American operators to rely on the more difficult mmWave bands.1 In fact, operators driven by high urban data density deployed more than 85,000 mmWave radio units in 2019. There is no better way to add truckloads of capacity.
However, 5G mmWave deployment has been a bumpy road so far. Operators have discovered that signals above 20 GHz do not behave well. The systems work as expected for line of sight conditions, but non-line of sight links are not as stable. In field deployment so far, the uplink is the clear limitation. This has always been the case, in 2G, 3G and 4G systems, as the link budget is usually 2-3 dB weaker for the uplink than the downlink. This time, however, mmWave field trials have shown more than 15 dB difference between the two link budgets. 5G networks need a closed loop for channel estimation, so both uplink and downlink are necessary. The result has been unstable performance in the field.
Another major challenge in mmWave comes from high attenuation along the propagation path. Obstacles, foliage, rainfall or even hands holding the device can add 30 dB of attenuation or more. Phased arrays partially overcome this limitation via spatial power combining, focusing the signal into narrow steered beams, as well as spreading the antenna array over a wider area. The benefits of phased arrays have made them the foundation for 5G mmWave deployments, but the lesson here is that the system needs margin, because any small change in the channel can quickly add 10 dB of path loss.
Today’s 5G mmWave networks are limited by RF power and heat dissipation. The uplink Effective Isotropic Radiated Power (EIRP) from early user equipment and customer premise equipment (CPE) has been too weak to provide the necessary link budget margin. At the same time, some devices have shut down during testing due to overheating.2
The success of mmWave clearly depends on solutions to a few key challenges: 1) Cost associated with limited range, 2) thermal and electrical power budget and 3) module cost. This article highlights these challenges and demonstrates how RF SOI based mmWave phased array systems can enable the optimum solution for future mmWave 5G infrastructure compared to other semiconductor technologies.
BASIC ARCHITECTURE OF THE PHASED ARRAY AND KEY METRICS
Phased arrays consist of multiple antenna elements with phase shifting at each element to steer the beam (see Figure 1). Phase shifting can occur in either the RF, as depicted in Figure 1, or digital domain. For optimal beam shape, the spacing of antenna elements in the phased array (lattice spacing) is typically a half wavelength. On-chip and PCB routing loss are very high at mmWave, so minimizing loss in routing from chip to antenna is important. As a result, mmWave front-end components (LNA, PA, switch) need to be physically close to each antenna element. At 28 GHz, λ/2 is 5.4 mm and at 39 GHz, it is 3.9 mm. The lattice spacing constraints and need for IC/antenna element co-location creates a thermal challenge. This is exacerbated by the low PA efficiency of first generation solutions. The high peak to average power ration of 5G NR modulation results in a large back-off from peak power operation, where the PA is inherently inefficient. With transmit efficiencies as low as 5 percent to 10 percent, the great majority of front-end power dissipation goes to heat generation concentrated within the lattice spacing as opposed to RF signal power. Improving transmit path linear efficiency is thus of paramount importance for next generation designs.
The array gain of a phased array is proportional to the number of array elements (N). On the Tx side, the combination of array gain and additional power per element results in an N2 increase in output power as compared to a single element. This fundamental property of the phased array enables a trade-off between semiconductor performance and the size of array needed to meet system requirements. In particular, the N2 reduction in output power per element to achieve the same system EIRP targets makes silicon technologies an attractive choice for all but the highest power applications.
The minimum requirement is adequate transistor performance (fT and fmax). Designers need a minimum of 5x and preferably 10x ratio between transistor cutoff frequencies and operation frequency for acceptable gain and circuit margin at the mmWave carrier frequency. This means that at the 39 GHz 5G band, a 200 GHz fT/fmax is the minimum acceptable and 400 GHz is preferred. Due to the high losses at mmWave, parasitics of active and passive elements are critical. Minimizing loss in the metal/dielectric stack is important since transistors must drive transmission lines at the top metal levels and for efficiency in power combining networks. Thick metal and dielectric stacks are important in minimizing this loss. Substrate losses are also important; quality factor of matching networks and transmission line insertion loss improves with higher resistivity substrates. On the Rx side, transistor NFmin is important for low noise circuits; on the Tx side, breakdown voltage and safe operating area are paramount for efficient power generation in the PA and for power handling in the antenna switch.
SEMICONDUCTOR TECHNOLOGIES - RF SOI VS CMOS VS GaN
In RF SOI technology, CMOS transistors are built on a top layer of silicon isolated by a buried oxide (BOX) layer from the silicon substrate. The oxide isolation reduces FET junction capacitance to substrate and improves FET performance. As a result, transistor fT and fmax in an SOI technology are higher than in a comparable node planar CMOS technology.
For example, GlobalFoundries (GF) has a 45 nm RF SOI in production that has been optimized for mmWave performance. NFET and PFET fT/fmax are 290/330 GHz and 245/300 GHz, respectively. Metal/dielectric stacks are optimized for mmWave performance and offer single and dual ultra-thick Cu levels for low loss transmission lines and combining networks and high Q passives. With the superior front-end performance and 45 nm logic density, the typical integration level for solutions based on RF SOI encompasses the PA, LNA, phase-shifter, and combiner front ends for 4-element and 8-element beamformers, and may also include mmWave up/down conversion and RF transceivers. 45 nm logic density enables the integration of high-speed SPI interfaces with large beam tables containing 1000s of entries, allowing for agile beamforming for high mobility applications.
A unique advantage of RF SOI technology is the capability to engineer the substrate for improved RF performance. High resistivity (>1K ohm-cm) substrates reduce signal loss to the substrate and improve transmission line loss and Q of matching networks. Higher Q input matching networks result in lower LNA NF. In addition, engineered substrates with trap rich layers under the BOX reduce parasitic conduction mechanisms that otherwise will degrade switch harmonics and linearity.
RF SOI transistors are fully isolated from each other by the surrounding oxide. Since the FETs are electrically isolated and there is no common substrate node as in bulk CMOS, FET’s can be connected in series (“stacked”) and biased such that the voltage is distributed equally across the stack (see Figure 2). Stacking overcomes the low breakdown voltage limitations of advanced node CMOS since the breakdown voltage of the stack is the sum of the BVds of the individual transistors in the stack. This is a significant benefit to front-end circuit performance, resulting in higher PA output power and efficiency and improved antenna switch insertion loss and power handling. 45 nm RF SOI PAs can deliver peak output power of 20-23 dBm at 28 GHz with high efficiency (>40 percent PAE). This is in contrast to solutions in advanced CMOS, where the low breakdown voltage of advanced node FETs results in lower Pout and PAE. The higher efficiency of RF SOI PAs is important in reducing thermal dissipation and addressing one of the key technology challenges of 5G arrays.
With 5G NR modulation, the PA will experience peak RF voltages that are 2x the supply voltage. Accurate evaluation of transistor degradation under complex 5G waveforms is important to assure the high reliability and lifetime requirements of 5G infrastructure are met. This is best done with PDK tools that seamlessly integrate reliability models with circuit design and simulation.