The Singapore-MIT Alliance for Research and Technology (SMART), MIT's research enterprise in Singapore, has announced the development of a commercially viable way to manufacture silicon ICs with high performance III-V devices inserted in the design.

The technology developed by SMART builds two layers of silicon and III-V devices on separate substrates and integrates them vertically within a micron. The process can use existing 200 mm manufacturing tools, which enables semiconductor manufacturers to use current equipment. As the cost of a new semiconductor manufacturing technology is in the range of tens of billions of dollars, this new IC platform is more cost-effective and should yield lower cost circuits and systems.

”By integrating III-V into silicon, we can build upon existing manufacturing capabilities and low cost volume production techniques of silicon and include the unique optical and electronic functionality of III-V technology.” — Eugene Fitzgerald, CEO and director, SMART

SMART is creating ICs for the 5G and pixelated illumination and display applications — a potential market of more than $100 billion. Wearable mini-displays, virtual reality and other imaging technologies are additional markets for SMART's integrated Si III-V ICs.

The patent portfolio has been licensed exclusively to New Silicon Corporation Pte. Ltd. (NSC), a Singapore-based spin-off of SMART. NSC is the first fabless silicon IC company with proprietary materials, processes, devices and design for monolithic integrated Si III-V circuits.

SMART's Si III-V ICs will be available in 2020 and are expected to be designed in products by 2021.


In most devices, silicon-based CMOS ICs are used for computing; however, they are not efficient for illumination and communications, and the low efficiency generates heat. This is why 5G mobile devices on the market get hot and may shut down after a short time.

This is an opportunity for III-V semiconductors, such as GaN and InGaAs. Due to their materials properties, they are more efficient and well-suited for optoelectronics (e.g., LEDs) and communications (e.g., 5G).

“Integrating III-V semiconductor devices with silicon in a commercially viable way is one of the most difficult challenges faced by the semiconductor industry, even though such integrated circuits have been desired for decades. Current methods are expensive and inefficient, which is delaying the availability of the chips the industry needs. With our new process, we can leverage existing capabilities to manufacture these new integrated silicon III-V chips cost-effectively.” — Kenneth Lee, senior scientific director of the SMART LEES research program