New materials and technologies are providing designers with the opportunity to produce solutions that could not be accomplished in the past, opening new avenues for innovative power amplifier (PA) design. The goal of every PA designer is to achieve the maximum performance from the transistor at hand; this is as true today as ever. Multi-standard requirements for wireless infrastructure are driving the need for broadband PAs capable of achieving performance across several bands. The requirement for power at ever-increasing frequencies is driving the development of n-dimensional power combiners and multiple-input-multiple-output systems (MIMO). The complexity of communication systems is driving a need to go beyond traditional approaches to impedance matching circuits and use such techniques as network synthesis.

Network synthesis requires an understanding of the components of a dynamically interacting system and designing a network that compels the desired performance. It is used widely in control, robotics and mechanical systems and is gaining renewed interest from the electrical engineering community, the field in which it originated. However, it has been somewhat neglected in the field of PA design: the output matching network is often considered to be just a passive circuit rather than part of a dynamic nonlinear system. Network synthesis provides a method of designing an interactive system, given a desired frequency or time domain response, with metrics such as power, efficiency and linearity. Such a system may include a passive or non-passive network that interacts with an active, often nonlinear device, the PA in this case. Let’s begin with the motivation for why network synthesis techniques are needed for PA design, considering the behaviors of transistors in a few popular PA architectures.

Figure 1

Figure 1 Classic representation and small-signal model of an HFET/HEMT transistor, such as GaN.1


In any approach to designing a PA, consideration must be given to how the active device behaves in the intended environment. There are many approaches to PA design, including load modulation, envelope tracking, harmonic termination and design for a varying load. While these techniques all have a different approach to shaping the performance of the active device, it really is all about the interaction between the device and the driving point impedance that it “sees.” The HFET or HEMT device, typical of modern GaN RF power transistors, illustrates the active device (see Figure 1).

What is going on in the transistor? The driving point impedance defines the interaction of the voltage and current at the terminals of the device and determines the power and efficiency. In an ideal device, the maximum output power and maximum efficiency occur at the same driving point impedance. What prevents this in a real device? The answer is harmonics, which shape the time domain waveforms and give the ideal efficiencies of the different classes of PAs, but can also reduce the amount of power generated by the amplifier. The time domain waveforms are defined by the impedances presented to the device over frequency. The harmonics are generated by the clipping that occurs from the knee voltage in the device and at Vdmax (see Figure 2), where the voltage is limited.

Figure 2

Figure 2 DC IV characteristics of a typical device.

The gate and drain voltages control how the charge flows in the channel of the transistor. By shaping these voltages with the driving point impedances, the behavior of the amplifier is shaped. Remember that the charge we are talking about is a combination of the mobile charge in the channel and the stored charge. The mobile charge is resistive and the stored charge is reactive, so the mobile charge can be manipulated with the real part of the load and the reactive charge can be manipulated with the imaginary part of the load.

Doherty Amplifier Design

The Doherty principle2 is an efficiency enhancement technique that relies on modulating the driving point impedance presented to a transistor using active load-pull techniques. The Doherty PA combines the outputs of two or more transistors that are offset by a quarter-wave transformer (see Figure 3). At low power, only the carrier amplifier is on, resulting in a greater efficiency than with a single transistor amplifier designed for full power. As the input power increases, the carrier amplifier is driven into saturation, and the peaking amplifier is driven on, changing the driving point impedance presented to the carrier amplifier, and hence its behavior. In an ideal Doherty PA design, the carrier amplifier’s load is pulled from its maximum efficiency point to its maximum power point.

Figure 3

Figure 3 Two-way Doherty PA.

Under Doherty load modulation the current through the transistor changes, so the charge in the channel changes. The carrier device can be viewed as a current source until it reaches saturation, when its behavior becomes that of a voltage source. When the peaking device turns on, it also behaves as a current source until saturation. As the peaking device is driven to maximum power, the Doherty PA can be represented as a voltage source (carrier device) in parallel with a current source (peaking device).

Supply Modulation Amplifiers

In dynamic supply modulation schemes such as envelope tracking (ET), the supply voltage Vd is varied to maintain high efficiency for all input power levels, by keeping the voltage swing at the maximum value of Vd–Vknee. Under drain modulation, the gate voltage is usually kept constant, so Cgs stays roughly constant, and the voltage across the channel of the device changes with the voltages across Cds and Cgd. As a result, two things happen: the charge on these capacitors will change, and generally the capacitance itself is voltage dependent and changes under supply modulation.3 Two effects are seen from this: The simple capacitance model is not good enough, because it is charge that is being manipulated by the drain modulation, so a fully charge-conservative model is desirable.4,5 Second, for GaN devices, the variation of Cds with drain voltage is very small, making the GaN process attractive for drain modulated PAs; Cds behaves more like a parallel-plate capacitor, making the simple approximation a good starting point. This is in contrast with LDMOS devices, where Cds exhibits a large variation with drain voltage. The variation in Cgd with drain voltage is often minimized in PA technologies by the use of field plates. For the PA designer, the power transistor under drain supply modulation can be thought of as a current source with a bias-dependent output admittance. The impedance of the output match is chosen to give the best performance over the changing output admittance of the device.

PA Design for Varying Loads

In applications such as wireless power transfer, radar and heating, the loading of the PA varies. Both the real and imaginary parts of the load can vary over a large range. Load variation is often dealt with by switching devices or components in and out and can lead to transients in the system. The power transistor will then be presented with impedances on various time scales, increasing the design challenge for the PA designer.

These examples of PA architectures establish that the core of any PA design is the driving point impedance at the points of interaction of the active device and the network within which it is placed.


By reviewing some basics of network theory, we can see how to adopt and adapt these methods for the design of the impedance environment that will get the best out of the power transistor.

Network synthesis is the art of realizing a network, once the desired frequency response in the form of a transfer function or driving point impedance is known. The synthesis problem for electric networks was solved with Cauer’s and Foster’s theorems. The oldest and most widely used network synthesis procedures apply to two-element networks: LC, RC or RL. One of the starting points of network synthesis was Foster’s reactance theorem,6 which provides the necessary and sufficient conditions for the class of all functions that can be realized as driving point impedances of one-port networks. Foster’s theorem can be realized as the driving point impedance of a generalized network made up of shunt-series LC branches or series-parallel LC branches. The technique uses partial fraction expansion to decompose the desired rational function into inductance or capacitance. Next, the realization of a one-port network with a defined driving point impedance based on continuous fraction expansion was developed.7 The network synthesis theory was developed to include the positive real approach,8 driving point impedances synthesized as RLC networks9 and the insertion loss technique.10

Figure 4

Figure 4 Distortion products generated by a transistor driven by a large two-tone input signal (a). The impedance matching network can be designed to minimize distortion (b).

Realization Techniques in Network Synthesis

The rapid development of techniques for the synthesis of two-port networks soon followed. Bode developed a technique based on the image parameter method,11 where the various sections of the network are defined as either bandpass or bandstop, and the filter sections are designed based on those specifications. This technique does not allow for the synthesis of an arbitrary frequency response but is useful in the design of simple structures.

Foster’s LC one-port theorem was extended to LC two-ports, initially assuming a symmetrical network. Cauer demonstrated the validity of Foster’s theorem for LC n-ports and showed that through linear transformations, all equivalent LC networks could be derived from one another. Belevitch12 developed three methods for the synthesis of LTI reciprocal n-ports. The first consisted of the sequential extraction of reduced impedance matrices and was too cumbersome to be of much practical value, but it led to the proof that any positive real impedance or admittance matrix is realizable,13,14 showing that a complete n-port system can be formed with RLC elements and the ideal transformer. The initial development came as an extension of Darlington’s method for one-ports, (i.e., the realization of a n-port as a reactive 2n-port with terminating resistors). This led to a formulation using scattering parameters and the scattering matrix for both reciprocal and nonreciprocal n-ports and, through this, solving the equivalence problem.14


Figure 5

Figure 5 Bode-Fano criterion for series LR (a) and parallel RC (b) networks.

PAs are designed with input and output matching networks that transform one impedance to another for performance, i.e., efficiency, power and gain. Additional requirements, such as bandwidth and linearity, can be improved with the deterministic design approach afforded by network synthesis. A single-stage PA design will have a two-port network on both the input and the output of the transistor and, with careful design, can mitigate the distortion. Figure 4 shows the distortion products generated by the transistor in response to a large two-tone signal. If the impedance matching network is designed as a bandpass filter, the distortion products can be minimized. The output shown in Figure 4 is for an ideal brickwall filter to illustrate the concept.

Bode-Fano Criterion

One important performance aspect is the bandwidth of the PA. The Smith chart gives a good match at a single frequency, but often a broadband design is required. The Bode-Fano criterion15 (see Figure 5) relates the quality of the match to the bandwidth of the match. The criterion shows that a perfect match is only possible if the bandwidth is a single frequency.

Cauer Networks

Let’s explore some of the basic LC filter building blocks, beginning with Cauer. For the examples, lumped element filters will be used while acknowledging that these filters can be converted or extended to microstrip or waveguide. Cauer networks are ladder networks and can be expressed as a continued fraction. PA designers familiar with the Smith chart may be surprised that they have been using the continued fraction technique, albeit at a single frequency: the series elements are summed on the impedance circles and the shunt elements on the admittance circles. The difference between the Smith chart method and the network synthesis approach is that the network synthesis approach takes frequency into account.

Figure 6

Figure 6 Structure of a Cauer filter.

Figure 6 shows the structure of a Cauer filter. The input impedance, Zin, is calculated with a continued fraction:

Math 1

Figure 7

Figure 7 Example Cauer LC filter.

Using the circuit in Figure 7 as an example, the frequency domain function of the input impedance, Z(s)in is as follows, where s = jω:

Math 2

Dividing the numerator by the denominator, beginning with the highest power, gives:

Figure 8

Figure 8 Cauer I (a) and Cauer II (b) networks, showing two topologies for each.

Math 3

where the second term is inverted. Next, the division is carried out on the denominator of the second term, resulting in the final form of:

Math 4

All rational functions can be formulated as a continued fraction by sequentially dividing and inverting the fraction. The two types of Cauer forms are shown in Figure 8, with two realizations of each. To realize a rational function, any of the four forms can be used provided the function meets the realizability conditions for the driving point immittance of a passive network: it must be positive real. This simply means that the function Z(s) or Y(s) is real for all real values of s and that the real part is greater or equal than zero when the real part of s is greater than or equal to zero. The Cauer I filter example of Figure 7 is a lowpass ladder network that is often used in the design of PAs.

Foster Networks

Foster networks are synthesized by the break down of the desired function of the driving point immitance of a passive network through partial fraction expansion. Foster I networks (see Figure 9a) provide open circuits to the transistor through series-parallel resonances and are realized from the partial fraction expansion of Z(s), while Foster II networks (see Figure 9b) provide short circuits through the use of shunt-series resonant components and are realized from the partial fraction expansion of Y(s).

Figure 9

Figure 9 Foster I (a) and Foster II (b) networks.

The expression for the Foster I realization is:

Math 5

From this form, the locations of the short and the opens of the network can by found by inspection. The first element is a short at equation, and the
parallel elements are opens at equation.

The Foster II realization is:

Math 6

This form also allows identifying the locations of the short and open circuits of the network by inspection. The first element is an open at equation, and the series elements are shorts at equation.

The different realizations can be combined to realize any given driving point immittance function.

Multiport Network Synthesis

The Cauer continued fraction expansions are useful for synthesizing a two-element one-port network, given a desired driving point immittance function. The extension of the continued fraction expansion to a transfer function matrix is applied to two-element multiport networks with a specified driving point immittance matrix.16 The n × n driving point impedance matrix that describes an LC, RC or RL n-port network is a symmetric and positive real matrix. The partial fraction expansion of an RC driving point impedance matrix is in the form:

Math 7

If TRC(s) is defined as

Math 8-9

The impedance matrix, TRC(s) can be obtained from Equation 9 and expanded in the Cauer matrix form.16 From this, the elements of the network can be determined.

Figure 10

Figure 10 MIMO Doherty PA.


We illustrate the network synthesis approach to PA design using an N-way Doherty PA (DPA).17 A DPA is usually realized by designing a match to 50 Ω for each amplifier, and using phase offsets and quarter-wave transformers to obtain the required load modulation. The MIMO approach to the synthesis of the load modulation presents the output network in a generalized form (see Figure 10).

For a general n-dimensional system of amplifiers, where the carrier amplifiers are numbered 1 to m, the peaking amplifiers numbered m+1 to n and the load is the n+1th node L, the output network is represented by an n+1 × n+1 matrix of frequency-dependent impedances or transfer functions. In this impedance matrix, the diagonal terms are the impedances presented to each individual amplifier when it is on and the others are off. The off-diagonal terms represent the load modulation from the other amplifiers as they switch on. The synthesis of the combining network is then cast in terms of the complex driving point impedance and the load modulation, or Doherty action. The first matrix in Equation 10 describes the driving point impedances of each amplifier, and the second matrix is the load modulation matrix that describes the interactions between the amplifiers. The impedances are complex frequency-dependent transfer functions.

Math 10

Here, C indicates the carrier amplifiers, P the peaking, L denotes the load node(s), ii indicates the driving point impedances and ij the cross impedances. This results in a generalized approach for DPA synthesis.

The driving point impedances for the carrier amplifiers are chosen to give the maximum efficiency in back-off. The modulation impedances are designed to modify the load of the amplifiers to give the desired efficiency and power during drive-up. This formulation of the modulation matrix is symmetrical, which reduces the number of equations to be solved by half. This is a powerful construct and can be modified to account for active load and phase modulation. The effectiveness of the load modulation on the complete PA can be optimized using this matrix approach, to maximize the efficiency of the PA at a prescribed back-off power, for example. The frequency response of the diagonal terms of the impedance matrix determine the bandwidth of the DPA. With the impedances in the matrix represented by transfer functions, the amplitude and phase are shaped to achieve the desired frequency response, enabling an approach to wide bandwidth DPA design.


PA systems are made up of dynamically interacting components, whether they are standard class A amplifiers, voltage supply modulated architectures or systems with intentional or unintentional load modulation. PA design requires a network to compel the desired performance, and the driving point impedances are at the core of this design. As PA systems grow more complex, there is an increasing interest in network synthesis techniques. A general review of network synthesis has been presented, demonstrating historical highlights of the development of this important field from early beginnings to a current application.

There are many more insights that can be found in the references for the interested reader, such as Carlin and Youla’s work on n-port synthesis18 and Fano on broadband matching networks.14 Carlin’s short article on unconventional circuit theory also contains a feast of references,19 and the author presented these concepts at the 2015 IEEE MTT-S International Microwave Symposium.20


  1. J. Wood, private communication (2015).
  2. W. H. Doherty, “A New High Efficiency Power Amplifier for Modulated Waves,” Proc. IRE, Vol. 24, pp. 1163–1182, 1936.
  3. G. F. Collins, et. al., “C-Band and X-Band Class F, F-1 GaN MMIC PA Design for Envelope Tracking Systems,” EuMW, 2015.
  4. J. Wood, “Microwave Bytes: Conservatively Speaking,” IEEE Microwave Magazine, Vol. 15, No. 7, pp. 110–115, November/December 2014.
  5. G. F. Collins, J. Wood, B. Woods, “Challenges of Power Amplifier Design for Envelope Tracking Applications,” 2015 Topical Conference on Power Amplifiers for Wireless and Radio Applications (PAWR), San Diego, January 2015.
  6. R. M. Foster, “A Reactance Theorem,” Bell Syst. Tech. J., Vol. 3, No. 2, pp. 259–267, April 1924.
  7. S. Darlington, “A Survey of Network Realization Techniques,” IRE Trans. On Circuit Theory, Vol. CT-2, pp. 291–297, December 1955.
  8. O. Brune, “Synthesis of a Finite Two-Terminal Network whose Driving-Point Impedance is a Prescribed Function of Frequency,” Doctoral Thesis, MIT, 1931.
  9. R. Bott and R. J. Duffin, “Impedance Synthesis without Use of Transformers,” Journal of Applied Physics., Vol. 20, p. 816, 1949.
  10. S. Darlington, “Synthesis of Reactive 4-poles which Produce Prescribed Insertion Loss Characteristics,” J. Math. Phys., Vol. 18, No. 4, pp. 257-353, September 1939.
  11. H. W. Bode, “A General Theory of Electric Wave Filters,” Bell Syst. Tech. J., Vol. 14, No. 2, pp. 211–214, April 1935.
  12. V. Belevitch, “Summary of the History of Circuit Theory” Proc IRE, Vol. 50, No. 5, pp. 848–855, May 1962.
  13. M. Bayard, “Synthese des R^seaux Passifs a un Nombre Quelconque de Paires de Bornes Connaissant Leurs Matrices d’lmpedance ou d’Admit tance,” Bulletin, Sociele Francaise des Electriciens, 9, 6 series, September 1949.
  14. Y. Oono, “Application of Scattering Matrices to the Synthesis of n Ports,” IRE Trans. Circuit Theory, Vol. 3, No. 2, pp. 111–120, June 1956.
  15. R.M. Fano, “Theoretical Limitations on the Broadband Matching of Arbitrary Impedances,” J. Franklin Inst., pp. 139–154, February 1950.
  16. C. J. Cooke and L. S. Smith, “A Multi-Port Network Synthesis using a Matrix Continued Fraction,” International J. Electronics, Vol. 43, No. 5, pp. 449–459, 1977.
  17. G. Collins, “A Generalized MIMO Design Technique for Broadband Doherty Power Amplifiers Based on Complex Network Synthesis Methods,” INMMIC, Dublin, 2012.
  18. D.C. Youla, et. al., “Bounded Real Scattering Matrices and Foundations of Linear Passive Network Theory,” IRE Trans. on Circuit Theory, Vol. 6, pp. 102–124, March 1959.
  19. H. J. Carlin, “Unconventional Network Theory” IEEE Trans. Circuit Theory, Vol. 11 pp. 324–326, September 1964.
  20. G. F. Collins, "Network Synthesis of Power Amplifier Matching Circuits - Standing on the Shoulders of Giants," 2015 IEEE MTT-S International Microwave Symposium, Phoenix, AZ, 2015, pp. 1-3.