Multilayer Bonding and Fabrication Guidelines

John Bushie
Taconic ADD
Petersburgh, NY

Increased performance requirements, packaging size and cost reductions have placed a new pressure on the RF design engineer and PCB fabricator to develop new and innovative solutions. One of the recent approaches to achieving these objectives is combining RF and DC control circuitry into a single multilayer PCB.

Multilayer circuit boards (MLB) allow the integration of digital and RF circuitry into a single assembly, thereby decreasing the overall PCB size and providing additional thermal paths. This combination also increases the overall rigidity of the final assembly.

Basically, there are two approaches to constructing a polytetraflouroethylene (PTFE) MLB. PTFE substrate multilayer boards may be bonded using a low dielectric constant, low loss sheet adhesive or bonding film. Alternatively, the MLB may be a hybrid consisting of layers of PTFE and FR-4 (or other thermosetting material) that are bonded using an FR-4 prepreg. (A prepreg is a sheet of resin-impregnated material partially cured to a B stage that is finish cured with the application of elevated temperature and pressure.) Figure 1 shows a cross-sectional view of a typical four-layer PCB comprising PTFE and FR-4, and using FR-4 prepreg bonding.


While multilayer PCBs have been common for years, the mixture of the twodifferent technologies in a single package presents a new set of questions related to materials, layer counts and fabrication techniques. It is not uncommon to see a mixed dielectric multilayer design with several layers of thermoset laminates such as FR-4, Getek, cyanate ester or polyimide bonded to several layers of thermoplastic laminates such as PTFE. Figure 2 shows examples of typical four- and five-layer configurations. Figure 3 shows a similar six-layer configuration. These multilayer configurations of different dielectric materials present several challenges for the microwave circuit fabricator.


Material Selection

The first step in the MLB construction process is the selection of the PTFE material for the RF signal layer(s). TLC- and TLE-type materials are designed specifically for multilayer applications. Their combination of low loss (< 0.003 at 10 GHz) and low coefficient of thermal expansion (CTE) in the z-axis (50 to 70 ppm/°C over 25° to 250°C) make them well suited for use in four- to 10-layer MLBs. TLY- and TLX-type materials may be used in multilayer applications due to their extremely low loss (< 0.001 and < 0.002, respectively, at 10 GHz), but the layer count typically is limited to a maximum of four layers due to the higher CTE in the z-axis (280 and 140 ppm/°C over 25° to 250°C, respectively).


This commercial multilayer technology has made it possible to combine and miniaturize all forms of devices such as power amplifiers and low noise amplifiers. In addition, MLBs can eliminate the need for some discrete components such as filters and couplers, which may be built directly into the multilayer circuit structure. Long delay lines may be placed on different layers of the board isolated in a stripline structure, decreasing the overall package size.

These configurations can be accomplished using plated through holes for connections between layers. Due to the use of plated through holes to connect circuitry from layer to layer, the design engineer must allow for the transition in impedance from circuit to plated through hole when modeling the circuit.

The Fabrication Process

Woven-glass-reinforced PTFE laminates will have a positive dimensional change in the x- and y-axes after removal of most of the surface copper during etching to produce the circuit layer. This growth can be compensated for by reducing the size of the inner-layer artwork prior to imaging. Exact values for artwork reduction depend on the amount of copper removed from a layer, circuit pattern and layer thickness. Table 1 lists basic scale factor values for the various material types.

Table 1
Typical Compensation Ranges


Positive Dimensional Change (PPM)


200 to 400


200 to 400


400 to 600


400 to 800

Mechanical scrubbing should be avoided when precleaning PTFE materials prior to dry film lamination. This process will stretch or deform the material as it passes through the pinch rollers and rotary scrub brush. Chemical preclean should be used exclusively.

Lamination, imaging and developing may be performed using standard inner-layer processes. The manufacturer’s directions should be followed for lamination, exposure and development.

In the course of inner-layer preparation, care should be taken to avoid disturbing the PTFE surface after removing copper during etching. This precaution will ensure a surface that is readily bondable. To provide a suitable finish on the copper surfaces, proper cleaning and preparation must be performed. Surface finishes that have been used successfully are light brown oxide treatments, microetch and electroless nickel followed by gold immersion. While it is true that oxide coatings and untreated copper surfaces will decompose and oxidize during lamination at temperatures suitable for fluorinated ethylene propylene (FEP) fill adhesives, the thermoplastic bond achieved should still exceed the Institute for Interconnecting and Packaging Electronic Circuits’ (IPC) specifications.

Typical thermoplastic sheet adhesive and bonding film materials are FEP and HT 1.5. Table 2 lists the performance of these materials at 1 MHz and 10 GHz as well as recommended bonding temperatures.

Table II
Typical Properties of Thermoplastic Bonding Films

Bond Film


HT 1.5

Dielectric Constant

2.00 at 1 MHz

2.35 at 10 GHz

Dissipation Factor

0.0007 at 1 MHz

.0025 at 10 GHz

Recommended Bond Temp.

282° to 296° C
° to 565° F

218° to 232° C
° to 450° F

Thermoplastic bonding films are not well suited for use in hybrid multilayers due to the temperature required to melt these materials. The lower thermal degradation point of thermosetting materials will cause these materials to oxidize and decompose. Typical lamination pressures range from 100 to 200 PSI at temperature. Adequate press padding must be used to allow for an even distribution of pressure. This process should yield a uniform bond line thickness and adequate adhesion.

Note that a high rate of cooling following lamination could cause excessive layer-to-layer stress that may result in delamination. Adequate thermal lagging, padding and a controlled cooling rate will ensure a successful bond.

Hybrid multilayer PCBs can be manufactured using conventional FR-4 or similar thermosetting prepreg systems. The lamination cycle, pressure and copper surface preparation should be the same as that used for standard prepregs. Consult the prepreg manufacturer for the processing parameters recommended for the particular resin system.

Once the lamination process is complete, the multilayer PCB then is drilled using standard tools and parameters. It is necessary to desmear the through holes of hybrid multilayer PCBs manufactured with FR-4 prepregs to ensure good mechanical and electrical contact with the innerconnects. This procedure should be performed prior to treatment of the PTFE hole wall surfaces. Desmear does not have to be performed on PTFE multilayers bonded with thermoplastic sheet adhesives, but a plasma treatment or sodium etch is still required to provide a wettable surface for the plated through hole chemistry.

Epoxy resin smear may be removed using standard plasma techniques for FR-4 laminates. Permanganate or sulfuric desmear of hybrid multilayers may be performed using standard processing techniques for FR-4 laminates. The PTFE is not affected by either plasma or sulfuric desmear.

A plasma treatment or sodium etch cycle may be used prior to plating the through holes. These treatments modify the PTFE in the through hole allowing the plated through hole chemistries to wet the hole wall surface. This process should be performed after desmear on hybrid multilayer PCBs. The FR-4 is unaffected by either process.

Plasma desmear and PTFE treatment may be performed in consecutive cycles. First, the desmear cycle is performed to remove FR-4 resin smear. Second, a PTFE treatment cycle is performed to modify the PTFE through hole surfaces.

Once the PTFE is treated, the through holes may be metallized using either electroless copper or direct metallization processes. Depending on multilayer complexity and thickness, the finished product should meet all IPC requirements for copper plating thickness.


High performance materials have made considerable advances in recent years making it possible to manufacture reliable multilayer structures at much lower costs than the high PTFE-content multilayer PCBs once used only in military applications. Fabrication of these types of multilayers has been aided greatly by new materials as well as the increased information available regarding processing. The lower thermal expansion and lower cost coupled with increased rigidity and regular availability can provide a packaging solution that the fabricator, engineer and purchasing agent can live with.