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Commercial radio technology has reached an inflection point, similar to the transition from analog to digital, when we invented a whole range of digital technology; now we’re moving from single carrier technologies, where we transmit one digital symbol at a time, to a new paradigm, where we’re potentially transmitting hundreds of symbols simultaneously.

In this paper, Part 3 of our three-part series on 3G/4G multimode handsets, the authors will examine the fundamental challenges engineers face when designing front ends to be multi-band and multi-standard across different modulations.

Radar signal generation and processing techniques are growing ever more advanced. These advances are being driven by the need to improve resolution (the ability to detect targets that are very close together) and reduce radar spectrum occupancy.

RF susceptibility or immunity test systems are often configured as dynamic hardware solutions that address more than one of the ever changing EMC standards. Automation by way of a software driven RF test system controller provides signal routing switch matrices and improves test reliability and engineering productivity.

This article is targeting on a technology of adjustable DC-DC converters, which can be implemented with GSM-GPRS-EDGE power amplifiers, as it is already widely used in CDMA/WCDMA handsets. Simulations show why this has not been used so far and how important the battery average consumption savings could be, with this low complexity technology used instead of a polar-loop architecture, which is under high effort recently in many companies.

This article describes the design flow for a high speed connector using several simulation tools.

More than ten years ago LDMOS transistors were introduced as a replacement of bipolar transistors for RF power applications [1,2]. Nowadays LDMOS technology is the leading RF power technology for base station applications, in particular for GSM-EDGE applications at 1 and 2 GHz, WCDMA applications at 2.2 GHz and more recently for WiMax applications around 2.7 GHz and 3.8 GHz.

This article describes the design and implementation of L-band frequency synthesizer based Local Oscillator to down-convert the uplink signal in a Telecommand Satellite Digital Receiver. An Integer-N PLL scheme was implemented to achieve a compact and low power module. The Local Oscillator when tested with the Receiver successfully achieved all performance parameters for satisfactory operation of the total system.

An optical photo lithography based 0.15μm GaAs PHEMT process and 2mil-substrate technology that enables high production throughput and low cost is described.