Accellera, the electronics industry organization focused on Electronic Design Automation (EDA) standards, announced that its Board of Directors answered electronic design verification tool users’ requests by approving the formation of a new verification standards committee. The Verification Intellectual Property (VIP) Technical Subcommittee (TSC) is chartered to define standard technology and/or methods to realize a modular, scalable and reusable generic verification environment.
Verification components and environments are currently created in different forms, making interoperability among verification tools or geographically dispersed design teams time-consuming and error-prone. The results of Accellera’s VIP standardization effort will improve interoperability and reduce the cost of repurchasing and rewriting IP for each new project or electronic design automation tool, as well as make it easier to reuse verification components. Overall, the VIP standardization effort will lower verification costs and improve design quality throughout the industry.
"Accellera is addressing the electronic design industry’s need for a common standard for Verification IP interoperability and reuse," remarked Shrenik Mehta, chair of Accellera. "Our newest VIP Technical Subcommittee's goal is to improve design productivity by making it easier to verify the design components with a standardized representation that can be used with various verification tools.”