A proof of concept LDMOS ultra-wideband Doherty (UWD) amplifier enables fractional bandwidths greater than 50 percent. It covers a frequency band from 470 to 803 MHz with peak power greater than 750 W, digital video broadcasting-terrestrial (DVB-T) power greater than 115 W and efficiencies of 38 to 47 percent. Predistortion capability is demonstrated by satisfying the digital TV linearity requirement of ‐38 dBc with a commercial DVB-T exciter. The impact of the UWD amplifier on transmitter operating cost is presented.

The standard for terrestrial digital video broadcasting, DVB-T, was set in 1997 and put into use in 1998 for the transmission of digital terrestrial television. It provides an advanced method of transmission compared to the previous analog format used before 1998. The entire TV signal has a bandwidth of about 6 MHz. Typical TV broadcast transmitters produce 1 to 10 kW of average power. DVB-T is an orthogonal frequency division multiplexing (OFDM) signal which contains carriers that are approximately 4 kHz apart. This signal has a high crest factor (or peak-to-average power ratio) of around 13 dB. High peak power creates design challenges, such as determining the size and shape of RF components suitable for short voltage peaks.

Figure 1

Figure 1 DVB-T transmit signal chain.

Figure 2

Figure 2 Wideband impedance inverter (a) and connection of the peaking amplifier to the impedance inverter (b).

It has been empirically determined that a power amplifier that compresses a DVB-T signal to a crest factor of 8 dB can still be effectively linearized with digital predistortion (DPD). For characterizing a power amplifier for a DVB-T application, 8 dB is the approximate peak-to-average ratio (PAR) that is typically used when considering peak power requirements. Predistortion is used almost exclusively in the broadcast transmitter market. Design goals typically achieve ‐35 dBc shoulders at a 4.3 MHz offset. A block diagram of the signal chain is shown in Figure 1.

Transmitting UHF digital TV signals1 is typically accomplished through the use of wideband push-pull class AB power amplifiers.2 As such, the achieved average efficiency is limited to 25 to 30 percent.2,3 Due to the very high output power levels involved, where the average power is typically 0.5 to 30 kW, maximizing broadcast efficiency is extremely important in reducing electricity use and the overall operating cost. The broadcast industry is looking for high efficiency alternatives to their current RF power amplifier blocks. Although various high efficiency architectures exist to provide wide RF bandwidth along with high efficiency,2,3 such as envelope tracking and envelope elimination and restoration, application to broadcast transmitters is complicated and costly due to the very high output powers involved. Doherty amplification2 is a cost-effective technique that is widely used in cellular base station transmitters; however, high-power Doherty amplifiers are notorious for having narrow RF bandwidth, typically 5 to 10 percent fractional.4 The solution to this problem is a wideband Doherty amplifier—greater than 30 percent fractional bandwidth.


Figure 3

Figure 3 Magnitude (a) and phase (b) of the normalized impedance seen at the device end of the wideband impedance inverter.

Although there have recently been a number of wideband Doherty amplifier techniques presented in the literature,3-6 most are inherently low power and require complex input signal conditioning, such as dual input drive and drain voltage control. This article addresses the needs of broadcast transmitters by presenting a simple but effective design technique that allows the development of wideband Doherty amplifiers with up to 60 percent fractional bandwidth that are suited for high-power levels. The approach presented here is verified with a 115 W (750 W peak) power Doherty amplifier covering the entire broadcast frequency band with average efficiencies of 38 to 47 percent while maintaining a minimum output PAR of 8 dB.7 This is achieved using standard 50 V
LDMOS technology without any added costs or increased complexity. The amplifier circuit described here can be used as a building block for achieving power up to multi-kW levels by combining similar amplifier stages.

Factors affecting the bandwidth of the Doherty power amplifier (DPA) are quite well known and documented. It was shown by Qureshi, et al.,4 that by (1) compensating the output capacitance of the PA devices in a wideband fashion and (2) interchanging the position of the power combiner and impedance transformation, it is possible to increase DPA bandwidth significantly. Overall bandwidth is still limited, however, by the bandwidth of the impedance inverter, which for a λ/4 transmission line (QWTL) impedance inverter is 28 percent, using a 10 percent relative efficiency drop condition at the band edges.3,4 In order to address the bandwidth requirements of the broadcast industry, the techniques presented by Qureshi, et al., are extended using a wideband impedance inverter to achieve a fractional RF bandwidth greater than 50 percent.

A very wideband impedance inverter can be created by adding an open circuited half-wave line (λ/2) to the load end of the QWTL, as shown in Figure 2a. The resulting loading conditions for this DPA are shown in the Figure 3 compared to a DPA based on a conventional QWTL impedance inverter. Figure 3 shows that the addition of the λ/2 line results in a much wider load modulation bandwidth. This circuit structure also helps to flatten the efficiency bandwidth in practical designs. The related achievable efficiency bandwidth is estimated to be more than 60 percent. This compares to approximately 25 percent fractional bandwidth for a simple QWTL inverter. The peaking device is connected to the open end of the λ/2 compensation line without any loss in functionality at the back-off power level, as shown in Figure 2b. The impedance of the compensation line must be chosen to be equal to the optimum load impedance of the peaking device. If the proper input phase relations are enforced, there is no bandwidth restriction on the wideband DPA under full power conditions (assuming the use of ideal PA devices).

Figure 4

Figure 4 Simplified schematic diagram of the UWD amplifier.


The analysis has so far considered ideal PA devices without any output capacitance. Practical devices, however, do have significant output capacitance along with package parasitics. It has been shown that these can be compensated in a wideband manner by absorbing them in the impedance inverter.3,4 Note that in this design, in order to absorb all parasitics in the “artificial” transmission line, the addition of external capacitors) is still required (see Figure 4).

An Ampleon (formerly NXP)BLF888D high voltage LDMOS device is used to demonstrate this concept. These devices provide wide bandwidth in combination with high-power and excellent ruggedness. A schematic of the wideband impedance inverter and wideband output capacitance compensation network is shown in Figure 4. The DPA is matched from the combining point impedance (1.25 Ω in this case) to 50 Ω using a wideband multi-segment impedance transformer.8 The circuit is fabricated using standard Rogers 3000 series PCB material (see Figure 5).

Figure 5

Figure 5 Assembled UWD amplifier.

To achieve maximum peak power, the output power of both devices is combined in phase at the power combining node (node X in Figure 4). It can also be deduced from Figure 2a that these phase relationships can be achieved by adding a λ/4 transmission line in front of the main device combined with an in-phase power splitter, as shown in Figure 4. Note that for the λ/4 transmission line to work properly as a phase compensator, it is important that the inputs of the PA devices are reasonably matched; otherwise, reflections from the PA devices will disrupt the actual phase relationships at the gates and, thus, at the PA outputs. Broadcast amplifiers, when aiming for a flat gain versus frequency response, however, are typically designed with high reflection losses (approximately ‐2 dB) at lower frequencies to compensate for the 6 dB/octave gain slope inherent in LDMOS PA devices. For this reason, it is essential to use an input splitter that isolates the PA devices from each other over the desired bandwidth, to minimize the impact of input reflections. The use of a two-stage Wilkinson power divider9 with a λ/4 transmission line in front of the main device keeps the phase error below 5° over the desired bandwidth and achieves the required isolation.

Figure 6

Figure 6 UWD amplifier pulsed RF efficiency vs. output power.

Figure 7

Figure 7 UWD amplifier gain and efficiency vs. frequency at 115 W average output power.


Figure 8

Figure 8 Corrected shoulders of the UWD amplifier with 115 W average output power, using a commercial DVB-T exciter. Peak output power is also shown.

The prototype UWD amplifier shown in Figure 5 was measured using pulsed RF, with a pulse width of 100 µs and 10 percent duty cycle and DVB-T signals. In order to measure the performance of the UWD amplifier with the modulated signals, a commercially available DVB-T exciter was used. The measured pulsed RF efficiency (see Figure 6) shows the capability of the UWD amplifier to maintain high efficiency at back-off power levels over a wide range of frequencies. Measured pulsed RF efficiencies versus frequency are shown in Figure 7, demonstrating average efficiencies ranging from 38 to 47 percent over the desired UHF band.

Note that the input PAR of the DVB-T signal is 9.5 dB and the PA is allowed to compress at most by 1.5 dB, so the resulting PAR at the output of the PA is always more than 8 dB over the desired band. All efficiency, gain and power measurements are performed under these constraints. Predistortion is also performed using the same DVB-T exciter. As shown in Figure 8, the UWD amplifier meets the 38 dBc linearity requirement for broadcast over the entire 470 to 803 MHz band.


Power usage is a big concern for the TV operator. The benefit of the UWD and its efficiency improvement compared to conventional class AB operation is significant. Figure 9 shows the impact of efficiency on operating cost, where the efficiency shown is at the 150 W UWD amplifier module level. Implementation of the 150 W UWD amplifier reduces the operating cost of a 10 kW transmitter by approximately $25,000 per year.

Figure 9

Figure 9 Transmitter operating cost per year vs. module efficiency, assuming 10 kW transmit power, 1 dB combining loss, 90 percent AC to DC power conversion efficiency and $0.11/kWh.


A design approach for the realization of high-power wideband Doherty amplifiers exhibits 50 to 60 percent fractional bandwidth. This is enabled through the use of a wideband impedance inverter along with a wideband capacitance compensation and matching strategy. The key achievement, and the importance to the industry, is that these results are achieved using standard 50 V LDMOS devices along with an easy-to-implement passive input splitter. The approach enables low cost efficient high-power wideband amplifier implementations and simple system integrations.

A UWD prototype amplifier covering the entire UHF TV band (470 to 803 MHz) achieved an average efficiency of 38 to 47 percent (for Pavg = 115 W), while maintaining a peak power capability greater than 750 W over the entire band. It offers 15 to 20 percent more efficiency than the currently used wideband class AB power amplifiers in today’s broadcast transmitter systems.10,11 This is the best demonstrated bandwidth for a DPA. An operating cost estimate shows the potential for a $25,000 reduction in annual operating costs for a 10 kW transmitter.

Since this proof of concept development, Ampleon has made considerable progress in increasing UWD amplifier power levels, with the recent focus on the 470 to 608 MHz range and development of a 150 W average DVB-T stage which uses a new LDMOS device. The focus on 470 to 608 MHz is driven by migration of the upper end of the UHF TV band in the U.S. to mobile wireless applications. The latest UWD amplifier in this frequency range has achieved 47 percent efficiency with less than -38 dBc shoulders.


The authors wish to acknowledge our colleagues J.H. Qureshi, W. Sneijers, R. Keenan, L.C.N. de Vreede and F. van Rijs for the initial design.7


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  10. “BLF888A/BLF888B High Power UHF Transistor (NXP Semiconductor),” www.mouser.com/ProductDetail/NXP-Semiconductors/BLF888A112/?qs=5XzWkq3%2FTOr3Fxsn35KN8w%3D%3D, www.mouser.com/ProductDetail/NXP-Semiconductors/BLF888B112/?qs=vbj%2FKoHZRAgwMN0Y2Riy8g%3D%3D.
  11. “MRFE6VP8600H High Power UHF Transistor (NXP Semiconductors),” www.nxp.com/assets/documents/data/en/brochures/BR1607.pdf.