NXP, the independent semiconductor company founded by Philips, announced a broad commitment to high speed data converters featuring the new JEDEC JESD204A serial interface standard. The JEDEC-based data converters lead NXP’s forthcoming portfolio of new high-speed 16-bit Analog-to-Digital Converters (ADCs) and new high-speed 16-bit Digital-to-Analog Converters (DACs). Underscoring its commitment to the JEDEC interface standard, NXP will demonstrate a JESD204A-compliant data converter in the NXP booth at the IEEE Microwave Theory and Techniques Society (MTT-S)/International Microwave Symposium (IMS) Conference in Boston next week. The demonstration will showcase the interoperability of NXP’s DAC1408D650, a dual-channel, four JESD204A data lane, 650 MSample/sec DAC with a Xilinx Virtex-5 FPGA.
Fully interoperable with cost-effective FPGAs from Lattice, Altera and Xilinx, NXP’s JEDEC JESD204A ADCs and DACs deliver outstanding analog domain dynamic performance. Compared to conventional parallel digital interfaces, the new JEDEC serial digital interface gives high-speed data acquisition engineers a compelling design-in option. The new JEDEC JESD204A interface can utilize as few as 6 I/O interconnect signals for a similar dual-channel data converter when compared with the older style 16-bit parallel LVDS interfaces which consume as many as 64 I/O interconnect signals. The JEDEC JESD204A interface also provides higher interconnect signal integrity, single-bit error detection, and enables system performance scalability without PCB design changes. These technical merits render significant commercial advantages for system designers including lower system cost, increased system reliability, higher functional integration, faster time-to-market and reduced design complexity. Targeted at macro cellular base stations, medical imaging equipment, high-speed instrumentation, video broadcast equipment, and military data acquisition applications, the new data converters highlight NXP’s renewed commitment to the high-speed data converter market.
“NXP believes there will be wide acceptance of the JEDEC JESD204A interface in various high-speed data converter applications and with many base station designs moving to the JEDEC interface in the next several years. In the future, NXP will continue to offer performance enhancements to its portfolio of high-speed data converters, through architectural and circuit-level innovations," said John Croteau, NXP Vice President, Analog and Mixed-Signal Products. “NXP is committed to the high-speed data converter market and will leverage its extensive corporate R&D resources to establish and maintain technical leadership in this important semiconductor component segment.”
"Lattice is delighted to be working with NXP to ensure seamless interoperability between our ECP3 FPGAs and NXP's JESD204A data converters. Combining high value, low power FPGAs with high performance data converters offers our mutual wireless infrastructure customers unprecedented savings in cost and power consumption without sacrificing throughput and performance," said Shakeel Peera, Director of Strategic Marketing for High-Density FPGAs, Lattice Semiconductor.
NXP’s new portfolio of data converters deliver outstanding dynamic performance at highly competitive power consumption levels, an important consideration as equipment designers strive for higher energy efficiency to reduce their customer’s total cost of ownership. Due to strength in small-signal RF products, RF power amplifiers and high-speed data converters, NXP is uniquely able to present a complete signal chain product portfolio - from antenna to digital baseband processor - for wireless communications infrastructure OEMs engaged in LTE, WiMAX and multi-carrier GSM/EDGE system designs. Beyond this focus market segment, NXP’s new high-speed 16-bit data converters are targeted to a broad range of industrial equipment designs, which require high linearity and low noise figures of merit.