From a radio designer’s perspective, the last decade has seen the semiconductor industry produce ever more capable devices that have finally enabled software defined radio (SDR) to advance beyond academic concept. SDRs are now a production reality for multiple applications across a range of markets. Availability of integrated transceivers, wideband RF data converters, and flexible RF MMICs give RF and system engineers a range of tradeoffs to implement configurable, digitally controlled radio hardware. This ability to adapt the radio’s configuration in the field has created new opportunities in the consumer, commercial wireless, and defense markets.

The first SDR platforms were defined by transitioning what was historically a single function block into a multi-function block. A crystal filter in a RF signal chain, for instance, would become a tunable filter or bank of filters in a SDR system. This level of flexibility was introduced across the signal chain, a few additional examples:

  • Data Converters: Increasing sample rates and analog bandwidths allow higher IF frequencies
  • Filters: Tunable filters and miniaturized filter banks allow variable signal bandwidths
  • RF Amplifiers: Wideband high-performance GaAs and GaN amplifiers cover multiple bands
  • Switches: SOI switches enable pin diode replacement and decrease radio size
  • FPGAs: replace dedicated processors and allow for signal processing flexibility

While these device improvements enabled SDR to become a reality, the architectures were typically not as size and power efficient as legacy single function systems. As an example, for a given signal processing function, FPGAs can consume up to 10 times more power when compared to a dedicated DSP implementation. Attacking this inefficiency is the industry’s current challenge.

The next generation of SDR platforms will require a new signal partitioning across the radio signal chain. The heart of this new partitioning is the data converter. Data converter performance will define many critical system level specifications for the radio:  maximum bandwidth, dynamic range, spurious tones, and latency among others. Data converter advances create opportunity to optimize the signal chain in both directions; towards the digital processing and towards the RF & microwave space.

Repartitioning the signal chain towards the digital realm requires an acknowledgement that, while FPGA technology improvements have been impressive, they are not the optimal device for all processing functions. An SDR with a 3GSPS data converter rarely needs to process the entire sampled bandwidth; often the signal of interest is only a 20MHz signal somewhere inside the sampled bandwidth. It is possible in an FPGA to implement decimation, digital filtering, and digital down-conversion to extract the desired 20MHz signal, but this is inefficient in two ways. First, implementing  DSP blocks with lower digital performance requirements, like a half-band filter, is not power efficient in high performance FPGA fabric. Second, implementing processing functions in the FPGA will reduce available resources in the FPGA for more demanding signal processing blocks. Next generation data converters for SDR must maintain high levels of mixed signal performance and include fully realized DSP function blocks to do this up-front signal processing, at a much lower power node, allowing for the FPGA to receive and process only the desired signal, and not the noise.  

Towards the RF & microwave space, next generation ADCs will increasingly continue the trend of higher sample rates and wider analog bandwidths. Today’s state of the art data converters have enabled direct sampling of L and S band. Next generation data converters will have sample rates over 10GSPS and analog bandwidths that cover C band, and even higher. RF developments in CMOS will enable transceivers that truly operate RF to bits, integrating what were historically separate RF devices into a new generation of high performance, wideband converters.

The SDR platforms realized by next generation data converters and RF devices will be smaller, and lower power while simultaneously allowing access into new frequency bands, with wider instantaneous bandwidths, and higher performance. In turn, this will enable more efficient, reconfigurable, and ultimately more capable systems.

Wyatt Taylor is the Aerospace and Defense Systems Applications Manager with Analog Devices Inc. located in Greensboro, North Carolina. He is focused on Aerospace and Defense radio applications, with a particular emphasis on integrated RF transceivers, small form factor microwave design, and software defined radio (SDR). Formerly, Wyatt was an RF design engineer at Thales Communications Inc. and Digital Receiver Technology Inc in the Maryland area. Wyatt received his MSEE and BSEE from Virginia Tech in Blacksburg, Va., in 2006 and 2005, respectively.