Technical Education Webinar Series

Title: Intelligent High Reliability PCB Stackup Design to Avoid Microvia, Plated Through Hole, Solder Joint, Warpage, Delamination, and Voiding Risks

Date: May 29, 2024

Time: 8am PT / 11am ET

Sponsored by: Avishtech

Presented by: Tarun Amla, PhD, Co-Founder & CTO and Keshav Amla, Founder & CEO, Avishtech

Abstract:
Microvia, PTH, and solder joint reliability, warpage, and delamination risks can render a PCB inoperable. These are a function of the stackup, including the choice of materials and constructions. However, in the traditional approach, the PCB stackup is not given much importance, despite governing the board reliability. In this webinar, we will explain the factors that lead to these failure modes and introduce simulation software that predicts reliability at the stackup design stage.

Presenter Bios:
Dr. Tarun Amla is Co-Founder and Chief Technology Officer of Avishtech. Prior to his current role, he held senior management positions in several major electronics materials companies serving the PCB industry.

Tarun’s career in the electronics and electronics materials industry spans more than 30 years, during which time, he has also worked for AlliedSignal, Isola, Shengyi, and ITEQ, holding senior positions. Some areas of Tarun’s specific technical expertise include Signal Integrity and Signal Processing, Wireless Communications, Optimization, Computational Mechanics, and Machine Learning. He is a named inventor on more than 30 issued U.S. and International patents and many more pending patents.

Tarun holds a Bachelor’s in Mechanical Engineering from the National Institute of Technology, Calicut, a Master of Engineering with emphasis on Modeling & Simulation from ASU, an MS in Mechanical Engineering (Computational Mechanics) from Purdue University, an MS in Electrical Engineering from Stanford University, an MBA from Northwestern University’s Kellogg School of Management, and a PhD in Mechanical Engineering from Arizona State University.

Keshav Amla is the Founder and Chief Executive Officer of Avishtech. Prior to founding Avishtech, Keshav held research positions at HP Inc., Stanford, Caltech, and NASA’s Jet Propulsion Lab, working on diverse topics, ranging from phonon transport to coronal mass ejections to dielectric properties. He has strong expertise in materials science, mechanical engineering, computational science, and software development.

Keshav founded the company while still a grad student at Stanford before transitioning to work full-time on building Avishtech’s leading-edge software and hardware solutions to address the most pressing and valuable engineering problems facing the development of electronics hardware. He has always been driven by the belief that even the most elusive and challenging questions in science and engineering can be answered with enough skill, knowledge, and hard work. Keshav holds a Bachelor of Science with Honors in Mechanical Engineering from Caltech and a Master of Science in Materials Science & Engineering from Stanford University.

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