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POWER AMPLIFIER DESIGN FORUM: Load-Pull Based Design Flows for High Power Amplifiers


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11/17/20 3:00 pm to 11/17/20 4:00 pm EST

Event Description

Power Amplifier Design Forum

Title: Load-Pull Based Design Flows for High Power Amplifiers

Date: November 17, 2020

Time: 12:00pm PT / 3:00pm ET

Presented by: Christian Bean, Senior Principal Application Engineer, Cadence

This presentation showcases the advanced load-pull technology in the Cadence® AWR Design Environment® platform for high-power amplifier (HPA) designers who must meet aggressive performance targets in short design cycle windows. Measurement techniques for load pull, source pull, harmonic load pull, and baseband load pull will be discussed. Specific new features in the latest release of the software for PA design will also be highlighted, including data management enhancements, ease-of-use improvements, as well as automated matching network synthesis, which integrates seamlessly with load-pull measurements to ensure that the best possible PA performance is achieved.

Presenter Bio:

Christian Bean is a senior principal application engineer at Cadence. Before joining Cadence, Chris held design and application engineering positions at Andrew-Commscope and NXP Semiconductors. He earned his B.S. in engineer physics from the University of Pittsburgh and his M.S. from the Ohio State University.

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