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Spectrum Above 90 GHz for Wireless Connectivity: Opportunities and Challenges for 6G

September 14, 2020

The spectrum above 90 GHz is foreseen as a key enabler for the next generation of mobile networks. The large amount of spectrum paves the way for high capacity wireless links. Many challenges still need to be overcome to make this technology a success. This article describes some of the scenarios for the spectrum above 90 GHz, coveted by the cellular industry for 6G. A benchmark of semiconductor technologies is discussed to highlight promising candidates and channel-bonding architectures as a suitable option for the implementation of extremely broadband RF radios with acceptable power consumption. Opportunities, challenges and some recent experimental results of D-Band transceivers implemented in CMOS technologies are discussed.

Next generation wireless networks are imagined to be faster, more reactive, ultra-reliable and denser. Therefore, the exploitation of new and wider bandwidths at higher frequencies is a promising solution toward very high data rates (100+ Gbps) and ultra-low latency (sub-ms). The frequency from 90 to 300 GHz, and the terahertz spectrum above 300 GHz, are definitively foreseen as key enablers for 6G communication systems.1 Several applications can already be imagined: high capacity back-haul/front-haul; short-range high data rate hot spots and device-to-device Gbps ultrashort-range communications as depicted in Figure 1.

Figure 1

Figure 1 Different scenarios for above-90 GHz wireless communication.

There are many challenges that need to be addressed to achieve high data rate communications for future deployments above 90 GHz. Performance and quality-of-service (QoS) are the main concerns for efficient adoption of these bands by stakeholders. Industrial concerns will be the most demanding in terms of performance and most promising in terms of market adoption. A specific aspect of very high frequency bands is that they will not provide long terrestrial-distances, as propagation losses make them impractical. Therefore, small cells are expected to be a key in the network and a direct consequence of this is the higher number of required elements, implying that low-cost and high energy efficiency will be critical goals.

System developments are usually built from the best individual building blocks. However, above 90 GHz, careful attention to the overall architecture must drive the selection of individual metrics and associated performance, closely related to power consumption and cost. Size may also be regarded as a key point as actual sparsity and sustainability will support environmental considerations and social adoption. All these beginning considerations address more challenging than ever targets to address high performance, given that frequency and expected throughput are very high, and bandwidth is very wide. In addition, it must still be possible to integrate all these features into a low-cost semiconductor process.

Starting from the antenna, a key component at these frequencies, directivity becomes a major issue, as user connection relies on narrow “pencil” beam-forming MU-MIMO (multi-user MIMO) providing higher gain, enhanced selectivity and jammer blocking thanks to spatial division multiple access (SDMA). The best antenna architecture will maintain performance but not at the cost of IC count, which has to be kept low. Antenna array designs too often mean multiple front-end modules (FEM) or transceivers.

Higher bandwidth than the previous generations, spread over multiple channels, has to be addressed without multiplying transceiver building blocks, especially power hungry and IC-area-consuming frequency synthesizers. So, PHY optimization is key to be supported by frequency generation, compatible with accessible integration constraints, over which high integration on a mainstream CMOS process is to be considered.

Addressing above 90 GHz bands therefore triggers cross-domain thinking for efficient implementation including small form factors and low-cost. In this article, two topics are highlighted: the choice of semiconductor technologies to address above 90 GHz spectrum as well as some architectural clues for designing low-cost and high performance RF front ends.

FRONT-END SEMICONDUCTOR TECHNOLOGY CANDIDATES

Silicon-based technologies offer low-cost compromises for RF and mmWave applications. However, the comparison of technologies is always difficult as technical metrics are cross-domain and non-technical parameters are also to be taken into account. We propose a benchmark of technologies focusing on intrinsic performance. In order to compare the technologies, a target representation of what should be requested to fit with the RF and mmWave wireless transceiver challenges is proposed in Figure 2.

f2.jpg

Figure 2 Process technology target.

Different criteria are depicted and will be placed in a target representation:

Power: RF output power availability from a technology depends on breakdown voltage (BV), and on the maximum current driven by the transistor (Imax) values. For a fair comparison, let’s define the max power as BV multiplied by 200 mA, which is optimistic for CMOS processes, and realistic for BiCMOS.

High Speed Digital Integration: RF digital control and digital pre-processing techniques are mandatory for mass-market and cost-efficient solutions. High speed digital integration depends on inverter size and efficiency (transit time/current).

Selectability: This is the ability to switch RF and mmWave signals with high isolation.

Linearity: The relation between the output current and the input voltage-control signal of the transistor gives the first order of the linearity while gm2 and gm3 impact IMD2 and IMD3 of the amplifiers.

Matching: This property defines the different behavior between two minimum-size transistors close together.

Isolation and HQ Passives: These are given by substrate resistivity and the presence of thick metal levels.

Ft-NF: Ft gives the potentiality for high frequency digital-clock and RF oscillator applications, NFmin determines the sensitivity of receivers.

Fmax: This the frequency of the 0 dB power gain, which impacts the gain availability of receive and transmit chains. For a linear class A amplifier, the maximum application frequency is lower than Fmax/3, (used in the comparison) for a switch-mode class-D amplifier, it is lower than Fmax/10 in an ideal case.

Figure 3

Figure 3 Comparison of technology over the defined key parameter indicators.

Advanced CMOS processes are very attractive for developing mixed RF systems-on-chip, as they offer very high integration potential and still, node after node, demonstrate better RF performance. Four different families in the 45 to 22nm node ranges are evaluated to address above 90 GHz applications: The bulk planar family is represented by a CMOS 40nm VLSI (TSMC); the partially depleted SOI family by a RF 45nm SOI CMOS (GlobalFoundries); the fully depleted SOI family by a FDSOI 22nm CMOS (GlobalFoundries) and finally, the FinFET family by a 22nm FinFET CMOS (see Figure 3). The Fmax limitation of these processes drives the only thin gate-oxide-transistor (or GO1) use, to perform RF functions, including power amplifiers targeting applications above 90 GHz.



40nm bulk CMOS, with up to 70 GHz in frequency cannot cover above the 90 GHz band. 45nm PDSOI covers up to 120 GHz mmWave applications. FDSOI 22nm offers very nice performance with the best in class CMOS applicative frequency of 130 GHz. FinFET family provides solutions for applications up to 110 GHz. Concerning the RF output power, 28 dBm is a frontier, the 45nm SOI having the best global behavior for RF applications with the wider target filled.

Silicon-germanium HBT processes overcome the current issue of silicon N-FET transistors with emitter-collector currents in the range of 10s of mA per μm2 emitter area. In addition, the 1/f noise-cut frequency of HBT is very low, in the 10s of Hz, which makes them very attractive candidates for oscillators and low-pass filters, functions which are critical in wireless links. The BV is proportional to the base thickness, therefore decreases with the HBT generations are targeting higher and higher Ft. We analyze and compare a 370 GHz SiGe HBT over 55nm CMOS process,2 targeting high frequency applications with high CMOS integration, and a 500 GHz HBT over 130nm CMOS targeting very high frequency applications.3 Both are compared to state-of-the-art III-V processes, InGaAs MOSHEMT from Fraunhofer IAF,4 and INP HBT from Teledyne. It should be emphasized that state-of-the-art SiGe HBT exceeds 700 GHz Fmax.

BiCMOS 370 GHz/55nm process covers applicative frequencies up to 120 GHz, while the BiCMOS 500 GHz/130nm process covers applicative frequencies up to 160 GHz, their output power remaining under 28 dBm. The 55nm process has higher capability for digital integration, while it is within the average for the other RF properties. The InGaAs MOSHEMT from Fraunhofer IAF presents a very attractive Fmax with 640 GHz, allowing it to cover up to 210 GHz applications with power output under 24 dBm. In addition, pretty good RF characteristics are demonstrated. The weakness is the integration of digital, which is not yet possible. Equivalent conclusions are for INP HBT and exceed 1 THz Fmax5 and open all the doors for applications up to THz frequencies.

A summary is depicted in Figure 4 to answer mmWave to THz applicative requirements for PA and LNA building blocks. The main limitation, in PA design, is the Fmax. Output power can be increased by design, consideration and staking PA array. BiCMOS processes, allying high Fmax HBT with CMOS integration, are very well placed, even if III-V InGaAs and mostly INP HBT are the best in class. The LNA is limited by NFmin and Fmax at the same time, and again BiCMOS is well placed, even if III-V processes obtain very good results, but lack the integration capacity of BiCMOS.

Figure 4

Figure 4 PA and LNA building blocks performance frontiers.

To conclude, cost will be the main factor to earn market share. BiCMOS and RF CMOS processes have already proven to be adequate up to 40 GHz, providing better integration and overall cost than InP HBT. It is acknowledged that the beyond 5G and 6G applications will continue to benefit from CMOS improvements, but new concepts should be proposed to efficiently address the THz band.

CMOS FRONT-END ARCHITECTURE FOR CHANNEL AGGREGATION

The RF front-end architecture for extremely broadband applications has to be selected considering both the large amount of bandwidth that is required at the RF section and reasonable sampling frequencies in the radio-to-digital baseband (BB) interfaces. Having this trade-off in mind, channel-bonding techniques seem a natural solution. Figure 5 shows an example of a Tx-and-Rx radio front-end based on such techniques. In the Tx of this example, 16 BB channels are combined and up converted in two steps up to D-Band (around 140 GHz), where each of the BB channels is found at a different RF sub-channel. The Rx realized the complementary down conversion process providing 16 parallel BB channels. Assuming reasonable D/A and A/D converters with sampling frequencies around 2.5 GS/s, this architecture is able to provide a total raw throughput of 102 Gb/s if 16-QAM modulation is used in each BB channel at a symbol rate of 1.6 Gbauds, and 156 Gb/s for 64-QAM modulation. The required bandwidth at D-Band is 32 GHz.

Figure 5

Figure 5 Example of channel bonding transceiver architecture and frequency plan.

The main challenge for channel-bonding architectures is that they require many different local oscillator (LO) signals. The frequency plan can be optimized to minimize the number of distinct LO frequencies required as well as to relax the bandwidth requirement of the radio up-and-down conversion blocks. Figure 5 depicts a frequency plan for the above 16 channels radio where only eight different LO frequencies are required. The signal bandwidth that has to be handled by most of the RF blocks is significantly smaller than the final 32 GHz. This approach enables the use of CMOS technologies: a large bandwidth and operation frequency are only required at the end of output of the Tx or the input of the Rx. The Tx sub-band PAs can be used to separately amplify sections of the output spectrum combined with passive power combiners to generate the full band output signal. In the Rx, a moderate gain broadband LNA can be considered with subsequent sub-band splitting of the signal, so that the LNA is the only CMOS circuit having to handle the full band signal. CMOS PAs and LNAs supporting this approach have been recently demonstrated,6,7 as well as the multi-frequency LO generation required.8

Very low phase noise LO signals are required for high-order modulation schemes such as 64 QAM and beyond. This is a hard constraint for classical mmWave LO generators based on PLLs and frequency division on top of the complexity of generating multiple LO signals of different frequencies. The technique presented in reference nine can be used as an effective way of simultaneously generating several LO frequencies, all of them integer multiples of the same input reference. It also allows achieving a low phase noise: the generation is based in frequency multiplication, which produces an output phase noise equal to the input phase noise, obtained at much lower oscillation frequency, just scaled up by the integer multiplication factor. The alternative multi-LO generation principle is depicted in Figure 6.9 A signal of a frequency much lower than the desired output LO frequencies is used to synchronously switch on and off an oscillator sized to have a free-run frequency in the LO frequency range. When operated in this way, this pulsed oscillator generates a multi-harmonic signal with terms at integer multiples of the switching input frequency (blue signal in the figure).

Figure 6

Figure 6 Multi-LO generation technique.

The spectral envelope of this signal is determined by the switching input signal duty cycle and is centered at the oscillator free-run frequency. However, note that the harmonic terms are at exact integer multiples of the input (…, N-1, N, N+1 …) and do not depend on the oscillator free-run frequency, albeit they have maximum amplitude around it. Several single-tone LO frequencies can be extracted from this signal by injection-locked oscillators that are sized to lock on one specific integer multiple of the input and to reject the adjacent terms, as shown in Figure 6. Each of the harmonic terms is synchronized in terms of phase to the input signal and therefore copies the input phase noise with an integer scaling factor (see the red signal in the figure, for example). This multi-LO generation technique has been recently experimentally demonstrated.8 It can be used for generating the four baseband-to-IF signals that would be required by the first channel-bonding step of the transceiver shown in Figure 5 and easily extended to generate in the same way the other four LO required for the IF to RF second conversion step.

CONCLUSION

The spectrum above 90 GHz is foreseen as a key enabler for the next generation of mobile networks for 6G. The large amount of spectrum paves the way to high capacity wireless links. Many challenges must be overcome to make this technology a success. First, where the design of CMOS RF modules is still possible for the low part of the D-Band, designing cost-efficient modules to address the THz band remains an open issue. Second, high gain antennas are required to meet the link budget. While the design of fixed-beam antenna is mastered, the holy grail remains the co-integration of RF and antenna to provide an electronically beam-steerable system. This would be significant breakthrough toward the next generation wireless system.

References

  1. Rajatheva et al., June (2020). 6G White Paper on Broadband Connectivity in 6G. Available online https://arxiv.org/abs/2004.14247.
  2. P. Chevalier et al., “A 55 nm Triple Gate Oxide 9 Metal Layers SiGe BiCMOS Technology featuring 320 GHz fT / 370 GHz fMAX HBT and High-Q Millimeter-wave Passives,” 2014 IEEE International Electron Devices Meeting.
  3. P. Chevalier et al., “SiGe BiCMOS Current Status and Future Trends in Europe,” 2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS).
  4. A. Tessmann et al., ”20-nm In0.8Ga0.2As MOSHEMT MMIC Technology on Silicon,” IEEE Journal of Solid-State Circuits, Vol. 54, Issue: 9, September 2019, pp. 2411–2418.
  5. M. Urteaga et al., “THz Bandwidth InP HBT Technologies and Heterogeneous Integration with Si CMOS,” 2016 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM).
  6. A. Hamani, A. Siligaris, B. Blampey, C. Dehos, J.L. Gonzalez Jimenez, “A 125.5–157 GHz 8 dB NF and 16 dB of Gain D-Band Low Noise Amplifier in CMOS SOI 45nm,” IMS 2020.
  7. A. Hamani, A. Siligaris, B. Blampey, J.L. Gonzalez Jimenez “167-GHz and 155-GHz High Gain D-band Power Amplifiers in CMOS SOI 45-nm Technology,” EuMIC 2020.
  8. A. Siligaris, J.L. Gonzalez-Jimenez, Clement Jany, B. Blampey, A. Boulmirat, A. Hamani and C. Dehos, “A Multichannel Programmable High Order Frequency Multiplier for Channel-Bonding and Full Duplex Transceivers at 60 GHz Band,” RFIC 2020.
  9. C. Jany et al., “A Programmable Frequency Multiplier-by-29 Architecture for Millimeter Wave Applications,” IEEE J. Solid-State Circuits, Vol. 50, No. 7, July 2015, pp. 1669–1679.