55 MHz to 15 GHz, Single Chip Synthesizer Delivers Low Phase Noise, Spurs
To support a diverse range of applications in aerospace and defense, wireless infrastructure, microwave point-to-point links, test & measurement and satellite terminals, Analog Devices has developed a wideband synthesizer with an integrated VCO that delivers excellent performance and flexibility. Using a fractional-N architecture, the ADF5610 generates frequencies from 55 MHz to 15 GHz and achieves the lowest phase noise of a single chip synthesizer. Compared to alternative solutions that use multiple, narrowband, GaAs VCOs and PLLs, the ADF5610 uses 50 percent less power, fits in a smaller footprint and offers a simpler board design, with the benefits of a lower cost bill of materials and reduced time-to-market.
Fabricated on ADI’s proprietary, SiGe BiCMOS process, the ADF5610 provides RF output power of +6 dBm, high modulation bandwidth and low BIT error rates. It has industry-leading VCO phase noise of −114 dBc/Hz at 100 kHz offset and −165 dBc/Hz at 100 MHz offset at 10 GHz, with a low normalized phase noise floor of −229 dBc/Hz. The integrated PLL provides fast frequency hopping and lock times below 50 μs with the appropriate loop filter. Phase detector spurious levels are typically better than −45 dBc.
The synthesizer is programmable using control software and the integrated SPI interface, compatible with 1.8 V logic and contains hardware and software power-down modes. The ADF5610 is biased with separate +3.3 V supplies for the analog, digital and charge pump circuitry and a +5 V supply for the VCO. Packaged in a 7 mm x 7 mm LFCSP, the IC operates from −40°C to +85°C.
Design-in is easy, fully supported by Analog Devices’ comprehensive, easy-to-use PLL synthesizer design and simulation tool, the ADIsimPLL™. Using ADIsimPLL, designers can assess phase noise, lock time, jitter and other parameters.