Microwave Journal
Anokiwave TF

All-Silicon Active Antennas for High Performance 5G/SATCOM Terminals

February 14, 2018

Active mmWave antennas are expected to be rolled out in unprecedented volumes over the next few years, fueled by the rapidly emerging 5G telecommunications infrastructure and high throughput satellite (SATCOM) markets. mmWave spectrum is attractive for these new high-capacity systems due to the availability of large bands of contiguous spectrum.

Using active antennas allows highly-directive antenna beams to be formed by physically-small apertures, which helps offset the higher path loss associated with these high frequencies. The highly-directive beams allow spectral reuse through spatial diversity. These planar antennas offer fast, steerable beams; low size and weight; and can be cost-effectively produced in high volume. Active antennas also provide excellent reliability, since there are no moving parts, and the failure of a few elements in the array has little effect on the overall antenna performance.

Figure 1

Figure 1 Trade-off criteria for active antennas.

This article will look at some of the key considerations for active antennas and address what is needed to make deployment successful. Two predominant architectural implementations will be compared, and analog, digital and hybrid beamforming will be discussed relative to the two implementations.

Active Antenna Considerations

As with any technology, there are considerations to effectively deploy active antennas, particularly at mmWave (see Figure 1). The primary considerations are mass producibility at the lowest possible recurring cost, thermal management, technical performance—such as effective isotropic radiated power (EIRP) for the transmitter and the ratio of receive antenna gain to system noise temperature (G/T) for the receiver—and elimination of array calibration. Secondary considerations include beam scan volume, beam steering update rate and regulatory compliance (i.e., 3GPP, FCC, ETSI).

Mass producibility and elimination of array calibration affect cost, as do EIRP and G/T. If the arrays are not architected efficiently, then they must be oversized to compensate, adding hardware cost. Beam update rate and scan volume are important for waveform timing, tracking moving targets and providing maximum spatial coverage. Thermal management is critical for reliable operation of the array. Finally, compliance to regulatory requirements, such as FCC and ETSI spectral masks and off-axis emissions, are required for authorized deployment. Another key consideration is the manufacturing process. Planar construction enables low-cost, surface-mount assembly methods and mass producibility. Simple scaling the size of the antenna printed circuit board (PCB) and number of antenna elements allows a single manufacturing flow to support arrays of various sizes, for multiple applications.

Two main planar architectures predominate for emerging mmWave active antennas. The following sections describe the two, drawing conclusions about their relative strengths and weaknesses.

Figure 2

Figure 2 Column-fed array with RF front-end outside the antenna array.

Column-Fed Array

The first active antenna architecture can be called a column- or row-fed array (see Figure 2). In this approach, control ICs are mounted outside the array and drive a single column, with a single gain/phase setting common to all elements in the column. A corporate feed structure is typically employed between the control ICs and the radiating elements. For simplicity, Figure 2 shows just four columns with four elements per column; however, any number of columns and elements per column can be used.

The control ICs may be transmit only, receive only or may support transmit/receive time-division duplexing with a SPDT switch, as indicated in Figure 2. A key advantage to this implementation is mounting the control ICs outside the array area, so the physical size and number of ICs is not critical. This enables high RF power technologies such as GaAs or GaN to drive the column; the result is very high RF power per element, enabling high transmit EIRP from a relatively small array. By simultaneously driving the columns from both top and bottom, the array can be dual polarized. With this approach, the corporate feeds driven from one side of the array energize vertical feeds to the elements, while the corporate feeds from the other side energize the horizontal feeds.

The main advantages of this architecture are

  • high RF power per element
  • only N control IC RF chains are required per N columns
  • the ICs are not constrained to fit within the lattice of the array, since they are outside the array area.

Figure 3

Figure 3 To overcome feed loss, the size of the array must be increased to achieve the required EIRP.

This last advantage is critical to GaAs or GaN solutions, as both semiconductor technologies lack the level of functional integration required to fit all of the control electronics within the typical λ/2 lattice of the array at mmWave.

The first and most obvious challenge for this architecture is that the control ICs are off the array; hence, feed lines must be used to route RF energy to and from the radiating elements. These lines add insertion loss at the worst possible location in any radio, i.e., at the front-end. Adding the ohmic loss of the corporate feed network, the impact on EIRP efficiency and G/T (receive noise figure) efficiency is profound. This increases antenna cost, since the array must be oversized to compensate for the losses. In Figure 2, 2 dB feed loss is shown; however, the actual loss will depend on how the feed lines are implemented. Figure 3 shows the effect of feed loss on transmitter EIRP. As feed loss increases, the array must be oversized to achieve the required EIRP. In this example of a 256-element array with +15 dBm transmit power per element, an imbedded element gain of +5 dBi and a feed loss of 2 dB, the array must be increased to 322 elements (a 26 percent increase) to maintain the targeted +68 dBmi EIRP. EIRP follows 20log(N), where N is the number of elements in the array, so EIRP can be recovered quickly by adding a few more elements.

However, the effect of feed loss is more significant for a receiver (see Figure 4). As feed loss increases, the array must be significantly oversized to achieve the required G/T. In this example of a 1024-element array with a 4 dB receiver noise figure, an imbedded element gain of +5 dBi and a feed loss of 2 dB, the array must be increased to 2019 elements (a 97 percent increase) to maintain the targeted G/T of +8.7 dB/K. The reason feed loss hurts the receiver much more than the transmitter is twofold: receiver G/T follows 10log(N), where N is the number of elements in the array, so it takes more elements to recover front-end loss. Secondly, depending on the values of feed loss and receiver noise figure, the feed loss can affect G/T by more than 1 dB/dB as indicated in Figure 5. For practical values of mmWave receiver noise figure (3 to 5 dB), G/T varies with feed loss by 1.5 to 2 dB/dB, meaning that a 1 dB feed loss degrades G/T by 1.5 to 2 dB. While GaAs- and GaN-based, column-fed, planar arrays offer high EIRP, their receive performance suffers significantly.

Figure 4

Figure 4 To overcome feed loss, the size of the array must be increased to achieve the required G/T.

Figure 5

Figure 5 Slope of G/T vs. feed loss and noise figure.

Another challenge with the column-fed architecture is that it only supports one-dimensional beam steering, i.e., azimuth (AZ) scanning only for the example in Figure 2. This lack of two-dimensional (2D) steering is probably acceptable for early, 5G, fixed wireless access applications; however, it is not suitable for applications such as low and medium orbit satellite (LEO/MEO SATCOM), mobile SATCOM and dense urban small cells for 5G, where 2D scan capability will be required.

Another challenge using GaAs or GaN control ICs is their inability to self-compensate for the amplitude and phase variations in the ICs. Lacking the ability to correct for part-to-part variations, which can exceed ±2 dB in |S21| and ±100 degrees in ∠S21, forces array calibration, which adds significant cost to the active antenna system.

There is also a concern that relying on 6-inch GaAs and GaN technologies, only available from a small group of global suppliers, limits how cost-effective these solutions can be in volume production. The ability to achieve low cost is limited by the need for precision lithography for millimeter wave frequencies, such as e-beam gate definition. Finally, using depletion-mode semiconductor technologies such as GaAs or GaN requires dual-supply voltages, positive and negative, which adds system cost. To protect these devices during turn-on and turn-off, DC sequencers are needed to prevent applying a positive voltage without the negative voltage, which increases system complexity and cost.

Figure 6

Figure 6 All-silicon architecture enables the RF front-end to be imbedded within the lattice of the array, i.e., on the backside of the antennas.

All-Silicon Array

The second active antenna architecture is an all-silicon array, where the beam steering control ICs reside within the lattice (see Figure 6). The beam steering control ICs contain the transmit output, receive input, gain control and phase control electronics, integrated on a single silicon die. The die may be transmit only, receive only or half duplex transmit/receive. Locating the die within the lattice of the array yields low feed loss between the die and the radiating element. With this planar construction, the control ICs are mounted on one side of a multilayer PCB, and the radiating elements are on the opposite side of the board. As shown in Figure 6, each control IC drives four radiating elements.

Advantages of this architecture include the lowest possible feed loss, which maximizes transmit EIRP and receive G/T efficiency. Since the individual radiating elements have unique amplitude and phase settings, this approach provides for full 2D scan, required for LEO/MEO SATCOM, mobile SATCOM and high density, urban applications. Another advantage of this architecture is using only high-yield silicon processes, the lowest cost processes in the industry, widely available from mainstream global suppliers. A typical silicon wafer size is 12 inches, which offers four times the wafer area compared to 6-inch GaAs and GaN. The high levels of integration available with silicon allow system on a chip (SoC) capability, where features can be imbedded to eliminate the need for array calibration. These are essential to meet the aggressive cost targets required by mass markets, such as mmWave SATCOM and 5G active antennas. Additional advantages of this architecture are

  • silicon ICs can provide telemetry to the host system, which is useful for health and status reporting and scheduling preventative maintenance
  • only a single power supply voltage is needed
  • no DC sequencers are required, simplifying system cost and complexity.

Challenges with the all-silicon architecture are

  • the number of ICs required per array is N/4, where N is the number of radiating elements in the array and each control IC drives four antenna elements
  • transmit power per element is typically limited to +20 dBm, much lower than what is achievable with GaAs or GaN processes.

However, the need for more ICs with this architecture is more than offset by using the lowest cost semiconductor processes. The lower transmit power per element can also be compensated for by enlarging the array, taking advantage of the 20log(N) EIRP characteristic of transmit active antennas. Enlarging the transmit array is not necessarily “bad,” since a larger array allows lower transmit power per element, which spreads the heat over a larger area and helps the thermal design. By enlarging the array and using aperture gain to develop EIRP, rather than the RF power per element, reduces the overall DC power consumption of the array.

Figure 7

Figure 7 Anokiwave 256-element, all-silicon array.

Measured data on Anokiwave’s 256-element, all-silicon array (see Figure 7) validates the performance of the all-silicon array architecture. At 28 GHz, the array provides a G/T of ‐1.1 dB/K in receive and an EIRP of +59.7 dBmi in transmit. Comparing the measured results with theoretical calculations, the transmit EIRP is calculated from

EIRP = 20log(N) + Ge +
Powerelement – Losses

where N is the number of elements in the array, Ge is the imbedded element gain (+5 dBi for a λ/2 lattice), Powerelement is +8.5 dBm and losses total 1.5 dB for the combined feed loss, element ohmic loss and radome loss. The calculated EIRP is

EIRP = 20log(256) + 5 + 8.5 1.5 = 60.2 dBmi

which is within 0.5 dB of the measurement. Similarly, the receive G/T is calculated from

Math 1

where N and Ge are the same as for the transmit array, To is the 290°K reference temperature, L is the sum of the front-end losses
(1.5 dB total or 1.41) and F is the noise factor of the receiver. Using 256 elements, +5 dBi imbedded element gain (3.14), 1.5 dB in losses and 5 dB NF (F = 3.16),

Math 2

which closely agrees with the measured results for the array.

Figure 8

Figure 8 Analog beamforming.


Three general beamforming architectures are used in active antennas: analog, digital and hybrid beamforming. This section describes each approach at a high level, compares their pros and cons and discusses how the column-fed and all-silicon architectures are impacted. While the following block diagrams denote receivers, transmitter block diagrams look similar, just reversed in direction and using digital-to-analog converters (DAC) instead of analog-to-digital converters (ADC).

Analog beamforming (see Figure 8) uses an analog beam weight at each element in the array with the all-silicon architecture or at each column in the array with the column-fed architecture. After the analog beam weights are applied, a coherent power summation forms the beam, followed by a suitable frequency down-converter and ADC to complete the receive antenna system. Table 1 summarizes the advantages and disadvantages.

Table 1

Figure 9

Figure 9 Digital beamforming.

With digital beamforming (see Figure 9), the beams are formed using complex digital weights rather than analog weights. To do this, a full receiver chain from antenna element to digits is required at every element in the array with the all-silicon architecture or at every column in the array with the column-fed architecture. For full 2D scanning in planar arrays, this is only practical at low frequencies, such as S-Band, where the lattices are large, with room to place the required hardware within the array. This approach is not practical for 2D scanning at mmWave frequencies, since inadequate real estate exists with the tight lattices. Since the column-fed architecture is limited to 1D scanning, it can implement digital beamforming because the electronics resides outside the array. Additionally, since a full receiver is only required at every column, rather than at every element, DC power consumption is reduced.

Other significant challenges with digital beamforming include high DC power consumption, especially if large bandwidths are digitized; signal routing complexity, where multiple bits of I and Q data must be routed off the array to the digital processor; and local oscillator (LO) signal routing within the array. On the plus side, if these challenges can be addressed, then this architecture is the most flexible, since multiple beams and nulls can be formed dynamically with no change in hardware, and each beam benefits from the gain of the full array. The advantages and disadvantages are summarized in Table 2.

Table 2

Hybrid beamforming is a cross between analog and digital beamforming (see Figure 10). An array with hybrid beamforming forms an analog beam from a portion of the full array (sub-array), with the resulting beams as illustrated in Figure 11. The figure shows the wide beam of the imbedded element, the narrower beam formed by the analog sub-array and two digitally-formed beams. For simplicity, only two digital beams are shown, but many beams can be formed within the analog beam. Both the all-silicon and column-fed architectures can use hybrid beamforming. The beauty of hybrid beamforming is it

Figure 10

Figure 10 Hybrid beamforming on the receive path.

Figure 11

Figure 11 Example beams with hybrid beamforming.

  • can be used at mmWave frequencies
  • provides the digital flexibility of being able to dynamically form many beams and nulls with no change in hardware
  • does not require a full RF chain per element, only a full RF chain per sub-array.

The main downside is that no single beam benefits from the gain of the full array. However, with the many advantages that hybrid beamforming offers, it is no wonder that this is the most popular beamforming approach used in emerging 5G communications systems today. The advantages and disadvantages are summarized in Table 3.

Table 3


Active mmWave antennas for 5G and satellite communications will reach unprecedented production volumes over the next few years, and two predominant planar architectures have emerged. One is based on GaAs or GaN ICs located off the array and the other uses silicon ICs imbedded within the array. While the GaAs/GaN solution offers very high EIRP capability, the approach has significant limitations, including poor receiver performance from high feed loss and the inability to self-calibrate. The architecture is limited to 1D scanning, requires bias support circuitry such as DC sequencers and offers a challenging path to low production cost.

In contrast, all-silicon active antennas overcome these limitations. While limited in transmit power per element, the architecture offers a clear path to high volume manufacturability and ultra-low production cost, while meeting all key considerations for active mmWave antennas.