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DesignCon is an annual educational conference and technology exhibition for chip, board, and systems design engineers in the high-speed communications and semiconductor communities. The content in the technical program is provided largely by engineers for engineers and focuses on the latest test and simulation solutions for signal and power integrity, jitter and crosstalk, parallel and memory interface design, ICs, and semiconductor components. Last week, thousands of engineers gathered at the Santa Clara Convention Center in drought-stricken California to learn about new design techniques and discover the latest products from an array of vendors many of whom serve both the high speed digital design and RF/microwave industries.
Proof of the overlap between high-speed digital and RF/microwave design could be found in the conference program and list of companies participating on the exhibition show floor. The move of high speed digital design for chips, PCBs and even cables into the RF/microwave realm is evident in the evolution of standards for high speed Ethernet. Similar to challenges facing the wireless community, the rapid growth of server, network, and internet traffic is driving the need for higher data rates over backplanes, resulting in a growing market for a lower cost, lower power, and higher density solution for all mediums including twinaxial copper cables, a type of cable similar to coax, but with two inner conductors. “Twinax” is becoming common in very-short-range high-speed differential signaling applications. During the lifetime of the Ethernet, the data rates have dramatically increased from its original 10 Mb/s to 100 Gb/s at the present time. In 2010, the IEEE802.3 body published the Ethernet 40 Gb/s and 100 Gb/s standard targeting the support of the next generation of communication equipment and components.
The IEEE Standards body for 100 Gb/s Operation Over Backplanes and Copper Cables - IEEE 802.3bj is currently under development by the IEEE P802.3bj 1 task force and is anticipated to be published next August. This project will specify 3 four-lane Physical Layer (PHY) specifications and management parameters for 100 Gb/s operation on backplanes and twinaxial copper cables and optional Energy Efficient Ethernet (EEE) for 40 Gb/s and 100 Gb/s operation over backplanes and copper cables. A tour of the exhibition floor revealed several vendors setting new watermarks with 100 Gbit/s Ethernet backplanes and 100 GHz-class testers. Meanwhile, the standard body is in the process of generating the next higher speed project, most likely to be 400 Gb/s.
Agilent Technologies was front and center on the exhibition show floor featuring their latest product releases for the signal integrity market as well as their new company colors and name (Keysight Technologies) resulting from the spin-off of the Electronic Measurement Group. Among the products being demoed, company application engineers were on hand to present Agilent’s high speed/high performanceOscilloscopes, Bit Error Ratio Test (BERT) Solutions, Logic Analyzers, Protocol Analyzers, Boundary Scan Analyzer, EDA Software, and RF & Microwave Network Analyzers. This year, the company was especially proud of its new J-BERT M8020A High-performance BERT, the new N1055A Time Domain Reflection/Time Domain Transmission (TDR/TDT) Solution, and the Agilent EEsof EDA Controlled Impedance Line Designer.
DuPont (Circuit and Packaging Materials) partnered with Rogers Corporation to conduct a workshop on understanding the properties of low-loss materials in high-frequency applications featuring live demonstrations using the Anritsu VectorStar™Vector Network Analyzer. The workshop introduced signal integrity engineers to the use of VNAs to study the microwave characteristics of thin, flexible materials from DuPont and thick, rigid materials from Rogers. Anritsu’s VNAs were also used in demos with Wild River Technology’s CMP-28 and CMP-32 Channel Modeling Platforms (CMPs), highlighting a solution to accurately verify measurement-simulation correlation on high-speed systems ranging from 6 to 32 Gbps data rates.
Wild River Technologyco-authored a session along with Dr. Jon Martens and Bob Buxton of Anritsu on “Managing S-parameter Data for 10 to 32 Gb/s Time-Domain Simulations”. This session which will also be featured at the EDI CON event in China later this year presented practical methods of managing S-parameters for optimal time domain simulation correspondence; identifying causality and convergence issues that plague time domain simulation, and techniques for resolving these issues in the S-parameter sampled system.
ANSYS was featuring demos on comprehensive modeling, co-analysis, and optimization solutions to assist with chip-aware package and system PI/SI, thermal and EMI challenges and provide package/system aware thermal and reliability for 3D-IC designs. The company’s suite of electromagnetic field solvers (HFSS, Q3D, SIwave, and Sentinel-PSI) provide highly accurate package, PCB and cable models for signal integrity validation and optimization of high-speed serial channel designs with end-to-end predictive analyses for customizable busses such as IBIS AMI, PCIe, USB, HDMI and IEEE 802.3 Gigabit Ethernet. Power and signal integrity of high performance DDR design using chip-aware package and PCB PI/SI simulation solutions were also featured demonstrating a methodology that integrates on-chip extraction of I/O power delivery network and I/O devices to accurately analyze high bandwidth, wide I/O communication. Steve Pytel, Jr., Product Manager at ANSYS, sat on two panels including a panel of engineers who design and characterize boards, use models, and perform simulations and a panel entitled “System-level Power Integrity, and What We Do When Measurements and Simulations Don’t Match”.
Teledyne LeCroyshowcased the latest innovations in test technology at the DesignCon 2014 exhibition in Santa Clara, January 28-30. A highlight of the exposition will be the 100 GHz bandwidth oscilloscope preview and technology discussion in booth 209. Product exhibits will demonstrate continued leadership in the speed, performance and analysis capabilities of oscilloscopes and signal integrity test solutions. Products featured at the expo include LabMaster 10 Zi oscilloscopes with 65 GHz bandwidth on up to 40 channels; HDO oscilloscopes, industry's first 12-bit high definition oscilloscopes; multilane serial data analysis; end-to-end compliance test for PCI Express®, and DDR4 signal integrity and timing analysis.
The company also presented eight in-depth technical tutorials and presentations on jitter principles, virtual probing and de-embedding, simulation and design techniques, including a well attended tutorial on the “Essential Principles of Jitter” by Alan Blankman of Teledyne LeCroy and famed SI guru Eric Bogatin (Bogatin Enterprises). Other talks included, The Jitter-Noise Duality and Anatomy of an Eye-Diagram and Computation of Time Domain Impedance profile from S-parameters.
Introbotixannounced the ACCU-Prober with TVNA™, a new configuration of their high frequency loss testing platform. TVNA is a test method that utilizes high frequency TDR measurements to produce insertion and return loss data and has shown an excellent correlation with measurements taken by traditional network analyzers. The TVNA is probe independent and can be used with any comparable probe solution, such as microwave probes or launch connectors. The ACCU-Prober with TVNA open platform provides a robust system capable of high volume testing.
Noisecom was featuring a new JV9000A demo, their latest addition to the Jitter series generators. The configuration on display was designed to emulate broadband white system noise and deterministic tones on the power ground planes. These can interfere with normal IC timing behavior of PLL's, MIPI interfaces and the phase noise of crystal oscillators. Commonly referred to as "noise on the Vcc input", broadband white system noise can cause an increase in system jitter if not properly measured and mediated. Company experts were also on hand to discuss 100 GbE and 10 GigE SFP test solutions.
Pickering Interfaceswas showcasing their broad range of RF & microwave switching solutions. The company’s RF and microwave switching solutions increase the flexibility of test and measurement systems with signal bandwidths up to 65GHz. Configurations available within their PXI and LXI platforms include multiplexers, matrices and general purpose switches
Rohde & Schwarzwill be presenting a series of four DesignCon sessions, including a presentation on “Signal Integrity Testing with a Vector Network Analyzer. In the exhibition space the company had several important application demos taking place including: how to evaluate EMI in real time using a near field probe and a digital oscilloscope by capturing transient events simultaneously in the time and frequency domains, revealing details about the sources of EMI that can quickly lead to mitigation strategies; jitter measurements on clock and data signals using a real time, digital clock recovery and trigger system; how to make accurate and the most sensitive jitter measurements on clock signals using phase noise measurement techniques, which also make it easy to separate random and discrete jitter components of precision clocks.; how to utilize multiple coherent sources to stimulate a differential high speed device for high accuracy and reproducible multiport signal integrity characterization using a Vector Network Analyzer..
Marki Microwave has taken the plunge into the SI market at DesignCon with an exhibition space to show off their line of baluns suitable for high-speed digital applications. Stanford Research was attracting attention from DesignCon visitor’s with their 10 MHz rubidium oscillators and 6 GHz vector signal generator.ARC Technologies was addressing the needs of attendees experiencing EMI issues with their new multi-layer absorbers and materials targeting 77 GHz W-band automotive applications.
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