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Anticipating the Future
Mike Heimlich is currently product marketing director for AWR's Microwave Office® and Signal Integrity Design Suite™ product lines and responsible for university programs. Prior to joining AWR, he was an engineer with Watkins-Johnson, Pacific Monolithics, and M/A-COM. In 1996 he co-founded Smartlynx, whose interoperability technology forms the basis for AWR's PCB flow integrations. Mike authors numerous technical articles on high-frequency designs, multi-domain signal integrity analysis, and design tool interoperability. His current research interests include design flow analysis and modeling. Mike holds a PhD from Rensselaer Polytechnic Institute (RPI).
To comment or ask Mike a question, use the comment link at the bottom of the entry.
Well, Sherry’s blog set me off again…..not in the sense that I was jealous of her spur-of-the-moment holiday in the Mediterranean. I was thinking about how ubiquitous smartphones and 3G technology have become. Mind you, I’m not a Luddite and, as an engineer, you would think that because my work enables so much change in other people’s lives that I too would embrace the latest tech trends as an early-adopter. Instead, I prefer to wait for the technology to mature, age a bit like fine wine, so you can separate the “Beta” from the “VHS”. And not that I need a clear winner as I’m perfectly happy with a world of iPhones and Blackberry’s (although, we do need a support group to help SOME people put them down when they are on vacation). But let’s face it: 3G technology is reshaping what we do with mobile technology.
Underlying the explosion are advances in wireless circuits and systems. Early mobile phones and pagers were testimonies to manufacturer’s purchasing departments - with a shopping list that rivaled the space shuttle. Like most stories in consumer electronics, the establishment of mobile telecommunications as a consumer success story was followed by a drive to lower cost led by integration and miniaturization. Wireless circuit designers saw specifications move from discrete components to single function MMICS and then to multifunction MMICs as GSM/EDGE and CDMA handsets became as inexpensive and indispensible as ballpoint pens. 3G, mobile telecomm/computing fusion, and “greener” power consumption have pushed front-ends from MMICs to modules.
I remember back in 2004 visiting more than a few suppliers to the handset manufacturers. While it was clear that the path to their future success was in the direction of module design, there was a good deal of fear and loathing in what was on the horizon. Some thought that “module design” was going to mean just integrating some MMICs and passives on a low layer count PCB using a PCB layout tool. Other’s thought it was a super-MMIC in a QFN package with a handful of SMD caps. Still others sought to combine several IC technologies to optimize performance by a “best in class” approach. Needless to say, it was not clear how, as an EDA supplier, we were going to meet this diverse set of visions for the future of handset component design.
What excited me was the concept of an industry that was supposed to be dying on the vine actually reinventing itself. I’ve had past co-workers move from GaAs MMIC design wholesale over to silicon saying that it was inevitable as CMOS dimensions got smaller; I even catch myself stealing a line from one of my wiser engineer elders that “GaAs is the material of the future and always will be” giving that world’s gallium would be quickly depleted if it had to replace silicon over night. Others left analog frontend design altogether to develop software defined radios based on DSP speeds approaching wireless carrier frequencies. But here were people with cutting edge design requirements embracing front end analog design and non-silicon technologies (at least in part) as the path forward for years to come.
At AWR, I have to say, there were just as many internal opinions as could be found in the industry we were supporting. Do we focus on the physical design challenges of module design? For some, the mantra, was the system level….design at the system level! Others wanted to focus on the simulation challenges and how do you ensure 3G performance at the circuit level. Still others saw EM as the bottleneck. I remember taking all this and putting it into a presentation to propose a cooperative effort at a few of the major component vendors as a basis for establishing a “next generation” module design system. Almost universally, I was met with an interesting reaction. It wasn’t skepticism about AWR’s ability to deliver such a solution but rather a lack of certainty as to the path forward. It was Beta versus VHS all over again. Or was it GSM vs W-CDMA?
Much to the credit of AWR’s leadership, we actually moved forward on nearly all the approaches. Physical design was beefed up to handle the inclusion of multiple IC technologies simultaneously, including silicon with GaAs or even GaAs on silicon, along with the PCB substrate and the package. System simulation flowed up to algorithm development through analog impairments (for budgeting, frequency planning, and performance like EVM or BER) down to circuit design and back up again. Simulation capacity was increased by orders of magnitude and was extended to include single-schematic driven linear, nonlinear steady-state, and transient simulations, as well as LVS/DRC verification. Verification was also made possible with breakthrough advances in EM and how it integrates to the circuit design flow as a whole.
What came out of this was not so much four or five new flows based on the 2004 visits. Certainly, the requests of each of the customer groups were satisfied, and I have no doubt that they were satisfied, at least in part, by their input being addressed and returned as enhanced functionality. The best part for me of the whole exercise was the emergence of module design. Sure, people had been talking about designing modules with interconnected MMICs since the 1980’s, but here was design of the module being done as the module—trading off MMIC performance at the transistor or passive component level across die and in the package—and not as a lab bench exercise in post-design hardware integration. The concurrent design of the whole module, not just the circuit simulation or the MMICs or the layout, has become a reality and the path forward.
So how are you designing modules? Has your design process been a success story of like VHS over Beta? Are you still “duking it out” with a great war story? Maybe it’s more like GSM/Edge and W-CDMA and a 3G success story.