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Mentor Graphics Corp. and STMicroelectronics have entered into a broad-scoped collaboration to develop advanced design solutions at the 32-nm technology node and down to 20-nm node. The three-year joint-development project, named DeCADE, seeks to build on advanced design solutions for System On Chip (SoC) development for digital and analogue design, including system-level approaches, design methodologies, place and route strategies, optical correction for advanced manufacturing, modelling, electrical characterization and parasitic extraction.
DeCADE will provide design solutions for core CMOS technologies as well as for value-added and application-specific derivative technologies that are developed from the core CMOS process. These projects can make a fundamental difference in chip capability and performance, as well as in system-solution cost; among the value-added derivative technologies being considered by the DeCADE projects include RF and wireless technologies, as well as 3D packaging and chip stacking technologies.
"This joint development effort will provide ST with tools to develop state-of-the-art Systems-on-Chips at 32-nm and below for ST's customers, taking full advantage of the strong silicon process, device modelling and design know-how present on the Crolles [France] Site," said Philippe Magarshack, STMicroelectronics General Manager of Central CAD and Design Solutions.
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