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Industry News / Test and Measurement Channel

Analog Clocking ICs Replace Expensive, High Frequency VCOs

August 17, 2009
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Analog Devices Inc. (ADI), a leader in high performance semiconductors for signal-processing applications, expanded its clock-product portfolio with the launch of the AD9552 oscillator frequency upconverter and the AD9547 clock synchronizer. Both products streamline system designs and reduce implementation complexity and cost while improving jitter performance.

The AD9552 replaces larger, expensive, high frequency voltage-controlled oscillators (VCO), including oven-controlled crystal oscillator (OCXO), voltage-controlled crystal oscillator (VCXO) and temperature-compensated crystal oscillator (TCXO) devices. The upconverter requires either a single-ended, low frequency reference signal or a crystal reference to establish the higher output frequency the IC generates. It provides ultra-low jitter of under 0.5 ps (picoseconds) operating with input frequencies in the range of 50 kHz to 80 MHz. The device can generate almost any desired output frequency up to 900 MHz for a variety of applications, such as HDTV, data acquisition, wireless base stations, test and measurement, networking and telecommunications. The upconverter features low power consumption–less than 400 mW in a compact 5 x 5 mm package size.

The AD9552 is a fractional-N, phase-locked-loop (PLL) based clock generator. The device employs a Σ-Δ (sigma-delta) modulator to accomplish fractional frequency synthesis. The user supplies an input reference signal by connecting a single-ended clock signal to the REF pin or by connecting a crystal resonator across the XTAL pins. The AD9552 is pin-programmable, providing one of 64 standard output frequencies from any of eight common input frequencies. The device also has a 3-wire SPI interface, enabling the user to program custom input-to-output frequency ratios. The AD9552 requires only a 12-nF external capacitor to complete the PLL’s loop filter. The output is compatible with LVPECL, LVDS, or single-ended CMOS logic levels.

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