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Agilent Technologies announced support for Agilent’s GoldenGate RFIC simulation, analysis and verification tools as part of STMicroelectronics’ (ST) 65 nm Design Platform. The qualification of GoldenGate for ST’s 65 nm RF technology is part of a long-term collaboration between the two companies to accelerate customers’ RF IP development time.
“The support of GoldenGate in ST’s 65 nm Design Platform allows our customers and our internal RF designers to use the best-in class simulation engine for RFIC design and verification,” said Jean-Paul Morin, CAD manager, Technology R&D, ST. “RFICs at advanced process nodes are very complex, and time to market can be significantly impacted without the right strategy for design and verification. We see GoldenGate as a cornerstone of this methodology for the mutual benefit of ST and its customers.”
ST’s 65 nm RF Design Platform allows designers to develop high-performance system-on-chip products for low-power, wireless, networking, consumer and high-speed applications. It is fully supported by the industry’s leading CAD tools from Agilent and other leading EDA vendors.
“The long-standing relationship with STMicroelectronics has met many milestones for RFIC design in adopting Agilent’s EDA platforms and tools for RFIC design, including our RF Design Environment and Momentum EM simulator,” said Thierry Locquette, Global EDA account manager with Agilent’s EEsof EDA division. “I am pleased that we have reached yet another milestone with the adoption of GoldenGate for RF simulation and advanced verification, proving that our next generation of RFIC tools continues to meet the company’s high standards.”
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