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Infineon Unveils New Transistor Architecture in Japan

June 18, 2007
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Researchers at Infineon have unveiled details of a new transistor architecture in Japan that removes many of the barriers to the production of smaller, more powerful electronic devices and circuits.


Known as multi-gate field-effect transistor technology, these transistors are part of the company’s energy-efficiency performance goals.

Infineon has completed the world’s first test with the new transistor architecture in 65 nm technology on complex digital circuits with more than 23,000 transistors that incorporate all of the key components used in today’s advanced integrated circuits and SRAM. With the shortest switching times ever measured with this type of architecture – at 13.9 picoseconds, an improvement of 40 percent when compared to previous results – the circuit sets a new record.

Commenting on the findings, Professor Hermann Eul, a member of the Infineon management board and head of the Communication Solutions business group, said, “We have measured a quiescent current that is a factor 10 lower than in today’s integrated circuits. That doubles the energy efficiency and battery life of mobile devices. These efforts give us high confidence that the integration of multi-gate transistors combined with our leading know how about applications will result in cost-effective solutions and power sensitive applications, extending battery life for consumers using mobile devices substantially.”

The company will continue to explore the new manufacturing process, which could be ready for use as a basic technology in mass production somewhere beyond the 32 nm technology node. This will be done partially in connection with its participation in the core partner program at the Interuniversity Micro Electronics Center (IMEC), Leuven, Belgium, the European Research Center.

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