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Industry News

Multilayer LTCC Modules

The AN/SPS-48, an example of multifunction LTCC module use in a military radar system

February 1, 2001
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Multilayer LTCC Modules

Kyocera America Inc.
San Diego, CA


Kyocera America's VisPro Division has been manufacturing a majority of the solid-state modules and transmitters that are the cornerstone of ITT Gilfillan's modern commercial and military radar systems. The AN/SPS-48, for example, is an advanced, highly capable air defense radar in service on many US Navy ships with solid-state transmitter modules produced by ITTG. This solid-state transmitter provides hot maintenance and has only three types of replacement units, which combine unique GaAs microwave chips with commercial off-the-shelf (COTS) components.

MULTIFUNCTION MODULES

ITT's RF chips are unique because they created the multifunction self aligning gate (MSAG) GaAs chip fabrication process to provide radar and communication systems featuring very wide bandwidth, high power efficiency and minimum size. ITT also leads the industry in integrating multiple functions (RF, digital and power) on a single MSAG chip, producing modules made possible by Kyocera that feature transmit/receive ultra-stable and variable power functions. This joint technology is being used by the US Army, Navy and Air Force in the development and manufacture of many types of modules and tiles for radar, communication and combined applications where lightweight, high performance and/or flexibility is required. The MSAG process has now matured and enabled numerous chip and module developments for the Department of Defense (DoD), across the microwave spectrum, from L-band through Ku-band. These accomplishments now underpin the development of surface and airborne multifunctional conformal arrays such as the Unmanned Aerial Vehicle (UAV) program.

Multifunctional tiles are a component of active arrays, which simultaneously provide synthetic aperture radar, satellite and ground communications functions from aircraft in a lightweight, flexible configuration. Figure 1 shows an exploded view of the tile Quad Module demonstrating the extreme compactness and efficiency of its design. These modules are replaceable in less than two minutes.

For the DoD, ITT pioneered the development and manufacture of C-Band T/R chips and modules (manufactured by KAI VisPro Division), demonstrating new levels of performance. Most notable were the power, degree of compactness and multiplicity of functions, all operating without failure on a single integrated chip and in a single, power efficient package.

More recently, ITT has received international and US Air Force orders of a Kyocera internally-developed, solid-state active array for air traffic control (ATC) -- the world's first such system. An S-Band airport surveillance radar with a solid-state centralized transmitter has also been internally developed and produced. Both of these ATC radars were produced with cost as the primary driver. They were realized at near zero required maintenance and with extremely high reliability through the maximum usage of COTS components.

SUBSTRATE OPTIMIZATION

Initial products allowed KAI VisPro Division to take ITTs' designs and fabricate substrates from Ferro materials to a level that is unequaled in the electronics industry. The engineering team (consisting of both ITT and Kyocera personnel) has been successfully reducing the number of ceramic layers with each build.

What the two companies have done is to incorporate the lessons learned process as an everyday part of the process from design through and including substrate fabrication. This approach has led to significant improvements in functionality while keeping a very complex and high profile program on schedule.

A portion of the initial low temperature cofired ceramic (LTCC) substrates that were manufactured by KAI VisPro Division for ITT consisted of 104 layers of Ferro A6M ceramic tape (dielectric) material interconnected by approximately 200 vias per square inch. All interconnect metallization for the vias and surface conductors were gold. In addition to the high number of dielectric layers, some of these substrates were manufactured as pin grid arrays with Gilbert shroud interconnects, cavities and additional interconnects.

The next generation of substrates produced utilized lessons learned and know-how gained in the first build. This procedure allowed the reduction of the number of dielectric layers from 104 to approximately 75. During the time that the number of dielectric layers was being reduced, the actual part size was being increased from approximately 0.6" square to nearly 1.5" square. The vias per square inch increased approximately 100 percent and some of the attached metal increased by as much as 400 percent.

The third generation of substrates produced utilized lessons learned and know-how gained in the first and second builds. This allowed a further reduction in the number of dielectric layers (from 75 to 50). The part size remained constant and the vias per square inch increased to as much as 800.

The final generation of substrates is currently scheduled for production this quarter. Again, the lessons learned process and know-how gained in the first three builds will be utilized. This process of continued optimization allows the package designs to further improve, yielding optimal product performance.

THE LTCC PROCESS FLOW

The LTCC process utilized in the fabrication of these modules begins with tape blanking. Ferro tape is received in roles where it is then blanked into 6" * 6" or 8" * 8" processing arrays. The array size is determined by a number of factors, including the number of ceramic layers per substrate, the size of each discrete substrate and the metal coverage. Next, the vias, where the electrical interconnects from layer to layer are formed, are punched in the blanked tape using a Baccinni punch. The vias are then filled and conductors printed with the precious metal of choice. Due to no plating being performed on the LTCC substrates, most metallization used for via fill and conductor printing with the Ferro low loss system is gold.

Resistors are next printed on the internal and external layers. However, once the structures are laminated and fired, the internal resistors cannot be trimmed. Only surface resistors may be post-fire trimmed.

Upon completion of via punching and all printing operations, cavities may be punched if the substrate has the need. All ceramic layers are then collated and green laminated at the appropriate time, temperature and pressure. The X and Y dimensions, as well as the Z dimensions, must be taken into account when considering the appropriate profiles to select. In addition, it is imperative to consider if resistors are used, how many different decades and how many ceramic layers they are on.

There are numerous post-fire processes that must be considered when attaching metal components to the fired LTCC substrates. Some of the metal components attached to the LTCC in the post-fired state are pins, seal rings, heat-sinks, leads and Gilbert shrouds. Finally, the LTCC circuit board assemblies are 100 percent electrically checked.

Kyocera America VisPro Division is continually striving to improve the processing of its LTCC substrates, thus yielding better products with significantly increased value added.

Kyocera America Inc.,
San Diego, CA (800) 468-2957.

Circle No. 303

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