A Broadband 2 to 18 GHz Cascaded Reactively Terminated Single-stage Distributed Amplifier
This article presents a novel design technique and measured performance for a broadband (2 to 18 GHz) amplifier using a cascaded reactively terminated single-stage distributed amplifier (CRTSSDA) configuration. The amplifier employs double heterojunction pseudomorphic high electron mobility transistors (DPHEMT). A commercially available CAD program was extensively employed to simulate and optimize the designs. A broadband (2 to 18 GHz) amplifier employing three CRTSSDAs was designed and fabricated. The amplifier achieved a gain level of 26 ?1.5 dB, and input and output SWRs of better than 2. In addition, the amplifier also provided substantially improved efficiency performance by more than twofold compared to that obtainable by an equivalent gain conventional three-stage travelling wave amplifier configuration.
Avtar S. Virdee
Filtronic Components Limited
Milton Keynes, UK
Bal S. Virdee
University of North London,
School of Communications Technology and Mathematical Sciences
Distributed amplifiers have been extensively investigated and realized successfully in hybrid (MIC) and monolithic (MMIC) circuit technologies.1,2 They have dominated broadband amplifier design for the last two decades and provide an excellent method for realizing amplifiers for multioctave band applications. Unfortunately, the gain performance of a single-stage travelling wave amplifier comprising two active devices is limited to approximately 8 to 9 dB. In order to realize high gain amplifiers, a number of single-stage travelling wave amplifiers must be cascaded. However, the major deficiencies of the travelling wave amplifier method are higher manufacturing costs and a substantial reduction in the amplifier power-added efficiency.
Broadband amplifiers with high stability, gain and efficiency characteristics are demanded for broadband systems, such as in electronic warfare applications. Other applications for their use include ultra-wide bandwidth pre-amplifiers for photodevices used in digital optical communication receivers and video detection. In practice these amplifiers are also required to provide high production yields and reproductibility to minimize manufacturing costs. The advent of the DPHEMT with low-associated device parasitic components enables the broad bandwidth to be achieved. Major advantages afforded by the CRTSSDA configuration3,4 are realization of high gain levels, significant reduction in power consumption and improvement in power-added efficiency. In addition, the amplifier can be realized in MIC or MMIC technologies and offers a cost-effective solution because the component count is significantly reduced in the realization of broadband high gain amplifiers.
The conventional travelling wave amplifier2 utilizes the well-known properties of an artificial transmission line consisting of series inductors and shunt capacitors contributed by the active device parasitics. The amplifier circuit can be analyzed in terms of ? or T-sections and has a frequency-dependent characteristic impedance that becomes wholly imaginary at the cut-off frequency at which point propagation down the artificial transmission line ceases. At frequencies below this cut-off frequency, a generator connected at one end of the line will dissipate all its available power into a load connected at the other end, provided that the generator and load have matched frequency characteristics and the line is loss free.
Figure 1 shows a cascade of three travelling wave amplifiers, each composed of two active devices. Although not shown, the bottom artificial transmission lines have shunt capacitors connected to them resulting from the active device's gate-source capacitance (Cgs ). The top artificial transmission lines have shunt capacitors connected to them due to the active device's drain-source capacitance (Cds ). The drain-source capacitances are also connected in shunt with the active device's current generator. The gate and drain lines are both terminated in their characteristic impedance Z0 , respectively.
A voltage wave from the gate generator, propagating down the gate line (with a phase constant b g ), develops a voltage across each gate-source capacitor. Consequently, each of these voltage drops produces a corresponding current with an appropriate phase delay in the drain line. In addition, the current from each active device drain port propagates down the drain line in both directions (with a phase constant b d ). The total combined current at the output load is therefore determined by the vector sum of the individual currents. Hence, the travelling wave amplifier is designed in a way so as to equalize (b g ? b d = 0) the phase velocity of the gate and drain transmission lines. The equalization causes the signals on the drain line to add in the forward direction as they propagate to the output. The maximum available forward gain Gconv for an ideal lossless n-stage conventional travelling wave amplifier is given by2
system's characteristic impedance
Equation 1 shows that increasing n increases the gain, and the gain is not a function of the bandwidth. This latter condition applies for loss-free amplifiers and needs to be modified for practical amplifiers with lossy components. In the case where there are m travelling wave amplifiers each containing n active devices, the total gain G is given by
G = (n2 g)m ? (2)
g = gain of each stage
as given by
The number of m travelling wave amplifiers required to realize a specific gain requirement G can be determined from Equation 2 such that
The schematic circuit diagram of the proposed cascaded reactively terminated single-stage amplifier is shown in Figure 2 . The conventional travelling wave amplifier configuration is based on the ladder network arrangement, whereas the CRTSSDA is based on the principle of cascading a T-section network of amplifiers in series. The signal power injected at the matched input generator port is coupled and amplified by the transconductance of the active device at each stage, and finally terminated by the matched output load port. At each stage, the signal power can be improved by terminating with a properly matched load resistor. Unlike the travelling wave amplifier, phase velocity equalization is not required for the CRTSSDA configuration due to the fact that the total output current is not dependent on the phase coherence of the individual current generators. The only requirement is to equalize the characteristic impedance of the input gate and output drain port of the active devices employed. However, the gate and drain inductance present in the circuit limits the amplifier bandwidth performance. It is shown here that the bandwidth limitation can be compensated by the inclusion of the inductance, Lvar , and resistance, Rvar . The selection of the bias components Lbias and Cbias also play a critical role in optimizing the bandwidth. These components should be chosen to possess minimum intrinsic parasitic components in order to avoid in-band resonances.
Figure 3 shows the equivalent diagram of the n-cascaded reactively terminated single-stage distributed amplifiers. This circuit has internal stages of characteristic impedance Zint , represented by the reactive elements Z(w ) = Rvar (w ) + jw Lvar (w ), and the input and output characteristic impedance Z0 . The output voltage at the (n ? 1) stage is given by3
The output voltage at stage n is
Therefore, from Equations 5 and 6,
The power delivered to a matched load is
Power available from the generator is given by
The small-signal gain Gcas available from the n-cascaded reactively terminated single-stage distributed amplifier is given by
The single stages are cascaded in series so that the signal propagates forward from the input to the output ports. Therefore, the gain for the ideal lossless n-cascaded single-stage distributed amplifier is given by
Comparison of Equations 1 and 11 shows that substantially higher gain level can be realized from the CRTSSDA configuration. The output power of the amplifier can be further improved by incorporating a large signal impedance matching network,5 represented by the impedance transformer (n:1) at the output of device T3. This configuration also further enhances the efficiency of the amplifier. Low cut-off frequency (fmin ) performance of the amplifier is determined by the components Lbias and Cbias , and can be determined using
The design process for the amplifiers covering the frequency range of 2 to 18 GHz began by initially characterizing the device to be used. The DPHEMT device selected was the state-of-the-art model LP6836 device manufactured by Filtronic Solid State, which has a gate length of 0.25 ?m and a gate width of 360 ?m. The device was characterized using the same mounting parasitic conditions that matched with the final amplifier construction. Small-signal S parameters were measured across 2 to 18 GHz. The measured S parameters were de-embedded from the test fixture, and the CAD program LIBRA? was then used in order to obtain the small-signal model. This small-signal model was fitted and optimized to the de-embedded S parameters. Excellent agreement between the optimized and measured performance has been achieved, as shown in Figure 4 , for S11 , S22 , S21 and S12 . Hence, the small-signal model (shown in Figure 5 ) derived using the above technique provides an accurate model for subsequent circuit simulation using this device.
Circuit simulations and optimization of a three-stage travelling wave amplifier and three-CRTSSDA were performed using LIBRA. The travelling wave amplifier design began with the determination, using Equation 4, of the minimum number of devices required in order to achieve a gain level of 27 dB, since this was the optimum gain obtainable from the three-CRTSSDA. A three-stage travelling wave amplifier comprising six active devices was required in order to achieve the specified gain level of 27 dB. Figure 6 shows the LIBRA schematic circuit of the optimised single-stage travelling wave amplifier comprising two LP6836 devices. The optimized small-signal response of the single-stage travelling wave amplifier is shown in Figure 7 . The predicted gain level was 9 ?0.5 dB, and input and output SWRs were better than 2. The optimized simulation response of the cascaded high gain three-stage travelling wave amplifier is shown in Figure 8 . The response predicted a gain level of 27 ?1.5dB and input and output SWRs of better than 2. The amplifier exhibited broadband stability performance (stability factor k > 1) from DC to 50 GHz, as shown in Figure 9 .
The design of the three-CRTSSDA began with the calculation, using Equation 11, of the number of devices required to achieve a gain level of 27 dB. Three active devices were required to achieve the specified gain. Figure 10 shows the LIBRA schematic circuit of the optimized three-CRTSSDA. The optimized small-signal response of the amplifier is shown in Figure 11 . The predicted gain level was 27 ?1 dB and the input and output SWRs were better than 2. The amplifier exhibited broadband circuit stability performance from DC to 50 GHz, as shown in Figure 12 .
Fabrication of the amplifiers was carried out by employing conventional thin-film MIC technology. The three-stage conventional travelling wave amplifier and three-CRTSSDA were fabricated on 15-mil-thick alumina substrates (er = 9.8) composed of nichrome and gold layers. The microstrip matching circuits were etched into the gold layer. Thin-film resistors were realized by etching into the nichrome layer, which was deposited below the gold layer. The alumina substrates were soldered onto the gold-plated tungsten copper amplifier housings. The LP6836 DPHEMT devices and chip components were epoxied. All the electrical connections were carried out using 0.7 mil gold wires. All the high value inductors were realized by fabricating miniature gold coils of the appropriate turns using 1-mil-diameter gold wire. In the fabrication of the gold coils particular attention was paid to minimize any in-band resonances over the operating bandwidth. Figure 13 shows the fabricated three-stage conventional travelling wave amplifier, and Figure 14 shows the fabricated three-CRTSSDA assembly layouts.
The measured small-signal gain and input and output return losses of the three-CRTSSDA are shown in Figure 15 across 2 to 18 GHz. The amplifier was operated in the self-bias mode of operation at 0.5 Idss . The measured gain was 26 ?1.5 dB and the input and output return losses were better than 9.6 dB (SWRs of better than 2). A comparison of the measured results with the simulated response shows excellent agreement.
The measured small-signal gain and input and output return losses of the three-stage conventional travelling wave amplifier are shown in Figure 16 across the 2 to 18 GHz frequency range. The measured gain was 27 ?2 dB and the input and output return losses were better than 9.6 dB (SWRs of better than 2). Excellent agreement has been achieved with the simulated performance previously shown.
The measured power-added efficiency performances for both the amplifiers as a function of frequency are shown in Figure 17 for Vds = 7.6 V and 0.5 Idss . The power-added efficiency results demonstrate the substantial improvement in efficiency; that is, in excess of 12.6 percent across 2 to 18 GHz is achievable from the CRTSSDA compared to only five percent achievable by the optimized conventional travelling wave amplifier design.
Design and fabrication of a novel high gain, broadband amplifier have been described by employing the CRTSSDA technology. An equivalent gain three-stage conventional travelling wave amplifier was also designed and fabricated to provide a performance measure to the novel CRTSSDA. The major advantages of using the CRTSSDA design approach were realization of compact design, achievement of excellent stability with frequency, achievement of high power-added efficiency performance when compared to a conventional travelling wave amplifier and significant reduction in component count of active devices employed. *
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2.??J.B. Beyer, S.N. Parsad, R.C. Becker, J.E. Nordman and G.K. Hohenwarter, "MESFET Distributed Amplifier Design Guidelines," IEEE Transactions on Microwave Theory and Techniques , MTT-32, 1984, pp. 268?275.
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4.?A.S. Virdee and B.S. Virdee, "2 to 18 GHz Ultra-broadband Amplifier Design Using a Cascaded Reactively Terminated Single-stage Distributed Concept," IEE Electronics Letters , Vol. 35, 1999, pp. 2122?2123.
?5.?B.J. Minnis, "The Travelling Wave Matching Technique for Cascadable MMIC Amplifiers," IEEE Transactions on Microwave Theory and Techniques , MTT-40, 1994, pp. 690?692.
Avtar S. Virdee received his BSc (Hons) in electrical and electronic engineering from the University of Leeds, UK and his MSc from the University of Cranfield, UK. His previous work experience includes two years with British Aerospace designing LNAs for spacecraft applications, six years with Plessey Microwave designing solid-state amplifiers for radar systems and four years with Electtronica UK Ltd. designing broadband amplifiers for EW systems. Currently, he is an R&D technical specialist in the field of solid-state amplifiers at Filtronic Components Ltd.
Bal S. Virdee received his BSc (Hons) and MPhil in electronic engineering from the University of Leeds, UK and his PhD in electronic engineering from the University of London, UK. He worked for Philips, Cambridge, UK, as a research and development engineer specializing in communication systems and at Leeds Metropolitan University and the Open University as a lecturer before he joined the University of North London. He leads the Microwave Research Group.