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Industry News

Ultra-high Linearity GaAs Mixers

A new generation of mixers with outstanding intermodulation performance, minimum space requirements and remarkably low LO power levels

May 1, 2000
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Ultra-high Linearity GaAs Mixers

Infineon Technologies AG
Munich, Germany

Mixers are common devices in modern communication and signal processing systems. They can serve as up- and downconverters and are combined in modulators for different balanced or unbalanced configurations. Current consumption, IP3 performance and conversion loss are critical factors in the successful design of mixer devices for mobile communication applications. In particular, excellent IP3 performance is mandatory for the nonconstant envelope modulation schemes utilized in American and Japanese mobile telephone or multicarrier systems. To address these needs, a new generation of mixers with outstanding intermodulation performance, minimum space requirements and remarkably low LO power levels has recently been developed.

Mixer Basics

Fig 1 Principle of operation The new 200 series microwave mixer converters implement a GaAs FET as a switch. As shown in Figure 1 , the switch, in parallel with the RF-IF path, is commutated at a frequency equal to the pump frequency; the pump frequency drives the FET between on (conducting) and off (isolated) states. An integrated LO buffer loop ensures correct switching of the FET within a very wide LO level range. The incoming RF signal is alternately passed through to the IF port or reflected. Hence, the RF signal appearing at the IF load is interrupted by the switching action of the FET. The pump signal (on/off) is a periodic square wave, which can be developed in a Fourier series. The corresponding Fourier series to a square wave signal in the frequency plane is a sum of dirac pulses with an amplitude distribution according to sinx/x. The switching process is a multiplication of the square wave signal with the incoming RF signal in the time domain. A multiplication in the time domain corresponds to a confluation in the frequency domain. From modulation theory it can be shown that the sum and difference frequencies of pump and RF signals appear at the IF port as well as products of higher order. Since there is a DC component in the pump signal, a switching product with the frequency component of the fundamental RF signals appears at the IF port; therefore, no inherent isolation between the different ports is present (unlike a balanced configuration).

Mixer Performance

Fig 2 The mixer's block diagram The model CMY210 mixer is an all-port, single-ended, general-purpose up-/downconverter. Due to the implemented switching concept an outstanding input IP3 of +23 dBm is achieved, which makes this device especially suitable for highly linear systems such as CDMA (IS95), US TDMA (according to IS136), PDC or the upcoming standard, UMTS. Figure 2 shows the internal block diagram of the mixer. To achieve the best performance, good port-to-port frequency separation is a must. The RF input filter must be a throughpass for the RF signal to be mixed; it has to reflect all sum and difference frequencies of the LO and RF as well as the harmonics of both. The IF filter is a tank circuit resonant at the RF; it reflects the RF and passes through the IF.

According to experimental investigations, even a stand-alone FET operating in the previously mentioned configuration can achieve very high IP3 performance. However, the major disadvantage of the single-FET configuration is the high LO power demand. In addition, a slight change in the LO power produces an unacceptable change in intermodulation performance. An integrated control loop for the LO power results in almost constant intermodulation performance (with L4 optimized for 1830 MHz operation).

Fig 3 Current consumption as a function of LO frequency for a typical PCS CDMA application at Vdd=3V Minimum current consumption of the loop can be adjusted by a properly chosen inductor L4 at the drain of the LO driver FET. L4 must be in parallel resonance with the input capacitance (approximately 2.1 pF present at pin 4) at the LO frequency in order to obtain a high LO voltage amplitude at the gate of the mixer FET. The LO voltage level at the mixer FET is detected and a control voltage is fed back to the LO driver. As soon as the LO voltage level at the gate of the mixer FET exceeds the threshold of the control loop, the operating current and gain of the LO driver drop. This mechanism ensures that device performance is stable over a wide LO power range. Therefore, sweeping the LO frequency over a broad bandwidth results in a minimum of current consumption of the LO loop, as shown in Figure 3 .

Fig 4 Typical 900 MHz IP3 input and conversion loss as a function of LO power level at Vdd=3V The mixer requires a low LO power level of only 0 dBm. Figure 4 shows IP3 and conversion loss for a typical 900 MHz downconverter application. IP3 remains constant at +23 dBm for an LO driving level of 0 dBm due to the integrated LO driver. When the LO level at the FET's internal gates is too low the integrated driver's power level increases. As soon as the LO power level reaches approximately 0 dBm, the mixer operates in a saturated state and the IP3 performance remains at a constant level. Any further increase in LO power does not influence IP3 performance significantly. The achieved results for up- and downconversion in the cellular and PCS bands are comparable; however, current consumption of the LO driver increases slightly due to lower amplification at the higher frequency. Comparable ring diode mixers with the same IP3 performance require an LO driving level of +13 dBm. For this power level an additional LO driver is necessary, generating spurious signals throughout the system.

Since the CMY210 device is a passive mixer, conversion loss and noise figure are equal. Conversion loss remains almost constant at a level of 6 dB over an extremely wide LO level range. The on resistance of the mixer FET, one of the major parameters determining conversion loss of the mixer, is quite stable even at reduced LO power. However, intermodulation is mainly limited by the risetime of the mixer and, hence, much more sensitive to LO power. In any case, a hard switching of the mixer FET is required to achieve optimized IP3 performance.

The CMY210 devices can be utilized in both directions, that is, up- and downconversion. The LO frequency should not exceed 2.5 GHz due to increased losses above that frequency. The low side frequency should be higher than 200 MHz due to internal capacitive coupling between the mixer and LO driver. The device is housed in a small, low cost MW6 surface-mount package based on the SOT143 plastic body (6 PIN leadframe) configuration and operates down to a 3 V battery environment or below.

A Typical Mixer Circuit Application

Fig 5 A typical demoboard for downconversion operation A typical application for this mixer is a downconversion configuration for CDMA according to IS95 for the American PCS systems. Matching of the previously mentioned external filters can be realized with lumped elements, distributed elements (such as microwave strip lines) or drop-in filters. Blank standard boards, which can be matched according to the requirements of the application, are also available for order. Figure 5 shows a matched demoboard for 1.96 GHz downconversion with an LO frequency of 1.83 GHz (actual size is 20 mm x 20 mm, er = 4.8, thickness = 1.0 mm). Table 1 lists the actual values of the used lumped elements.

Table 1
Demoboard Component Values for 1960 MHz to 130 MHz Downconverter Operation

L1 (nH)

3.3

L2 (nH)

3.3

L3 (nH)

6.8

L4 (nH)

3.3

C1 (pF)

1.8

C2 (pF)

1.5

C3 (pF)

1.5

C4

15pF + 1nF + 1µF

The RF and IF ports achieve an input return loss of better than 10 dB in a 50 W system with the given filter configuration. The board was tested with a 3.6 V nominal battery voltage of Li ion batteries and a corresponding operating current of only 7.0 mA. The necessary LO driving level for the downconversion process is 1 mW as discussed previously. The achieved IP3 at the input port is typically 23.5 dBm with an associated conversion loss of 6.2 dB. Table 2 lists the achieved values for this typical PCS CDMA operation at a 1960 MHz RF, 1830 MHz LO, 130 MHz IF and 0 dBm input LO power at 25ºC.

Table 2
Typical Performance for PCS CDMA Applications

Operating current (mA)

7.0

Conversion loss (dB)

6.2

SSB noise figure (dB)

6.2

Third-order input intercept point (dBm)

23.5

RF/IF input return loss (dB)

> 10

Conclusion

The CMY210 device is a highly linear mixer operating in the cellular and PCS frequency range. It is an alternative to high cost and space-consuming ring diode mixers and can be utilized in up- and downconverter applications. The model CMY211, a low current derivative with a current consumption of 2.5 mA and an associated IP3 of 17 dBm, was recently introduced. The next move to higher integration will be a combination of an IF amplifier and this mixer cell (model CMY212).

Infineon Technologies AG, Munich, Germany +49 (0)89 234 24778, fax +49 (0)89 234 27215 or e-mail: heinz.banzer@infineon.com.

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