Xilinx has monolithically integrated RF-class analog technology into its 16 nm UltraScale+™ multi-processing system on a chip to create the world’s first hardware and software programmable RF SoC (RFSoC). Based on an ARM-class processing subsystem merged with FPGA programmable logic, the all programmable SoC has 12-bit, 4 GSPS RF sampling analog-to-digital converters and 14-bit, 6.4 GSPS direct RF digital-to-analog converters, along with built-in digital down-conversion and up-conversion. RFSoCs enable a 50 to 75 percent reduction in system power and footprint for LTE-A Pro and 5G active antenna systems and massive MIMO radios.
Because massive MIMO radio systems have large antenna arrays that use many analog chains, they create a significant challenge for connecting digital front-end devices to many data converters. Typically, high speed transceivers—leveraging the JESD204B protocol—are needed both in digital and analog components to build such systems, dissipating significant power and increasing footprint. Integrating RF-class analog into the digital front-end radio device eliminates expensive interconnects, reduces the footprint and dramatically lowers power dissipation, making massive MIMO systems commercially viable.
Using a 16 nm FinFET process node for direct RF sampling data converters improves analog device performance at a much lower power compared to traditional data converters that are built on older nodes. Integrated RF sampling data converters simplify the signal chain by eliminating the intermediate frequency stage. Built-in digitally assisted analog design brings much needed programmability to the analog domain, addressing the extensive range of cellular bands with the same architecture and building blocks and reducing the growing number of radio form factors that must be maintained today.
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