A Low Cost, Interchip HBT Bias Regulation Approach for Low Noise, High IP3 Receiver Architectures
A 9 to 21 GHz broadband, high third-order intercept point (IP3), heterojunction bipolar transistor (HBT) balanced amplifier with monolithic current regulation and additional current regulators to accomodate a preceding high electron mobility transistor...
A Low Cost, Interchip HBT Bias Regulation Approach for Low Noise, High IP3 Receiver Architectures
A 9 to 21 GHz broadband, high third-order intercept point (IP3), heterojunction bipolar transistor (HBT) balanced amplifier with monolithic current regulation is demonstrated in this article. The HBT balanced amplifier MMIC also integrates four additional current regulators at the input side of the chip in order to accommodate bias regulation of a preceding high electron mobility transistor (HEMT) low noise amplifier (LNA) MMIC. The octave-band HBT amplifier achieves 11 to 12 dB gain, an IP3 of 26.4 to 29.0 dBm and a noise figure of approximately 6.5 dB across the 9 to 21 GHz band. The HBT chip is fully self biased through a 5 V supply and consumes a little over 100 mA of current. The current regulators consume eight percent of the total DC power of the MMIC. Eight current regulators and four HBT amplifier sections are integrated into a small 3.7 ¥ 3.1 mm2 area and result in at least a 20 times reduction in size, and fewer components and wirebonds compared to a conventional hybrid implementation. The HBT monolithic bias regulation approach focuses on a key HBT application that can significantly reduce the size and cost of modern integrated microwave receiver assemblies designed for commercial satellite communications .
TRW Electronic Systems and Technology Division
Redondo Beach, CA
Recently, there has been a demand for low cost and high volume (tens of thousands) III-V-type MMIC semiconductor components for commercial satellite applications, which encompass wireless telecommunications, the Internet in the sky (Teledesic) and more. Many of the issues involved in inserting GaAs and InP semiconductor ICs in space applications have been dealt with extensively in military satellites. However, in these new commercial applications, hundreds of low, medium and high earth-orbit satellites are required for establishing a telecommunications network above the Earth that can replace thousands of conventional ground-based networks. Thus, reducing the cost of each satellite by employing MMICs in place of cumbersome and expensive MIC hybrid circuits is one of several paths toward reducing part count, complexity and cost of satellite electronic payloads.
Although the use of MMICs to replace several discretely integrated components in a hybrid can reduce the part count and cost of a given microwave circuit or subsystem dramatically, there is a limit to the amount of circuit consolidation that can be achieved by a single semiconductor technology while maintaining the best system performance. Much of the MMIC implementation cost is driven by the integration of peripheral off-chip components such as regulators or control circuitry because many of these circuits may not be employed practically using a single III-V microwave semiconductor technology.
One specific example involves a satellite receiver application where it is desirable to obtain low noise figure, high IP3 per unit power and small size by integrating the fewest number of components to lower the implementation cost. Optimum receiver sensitivity and dynamic range can be achieved by hybrid integrating a HEMT LNA MMIC and a high IP3 HBT MMIC, as shown in Figure 1 . This optimum technology selection using HEMTs and HBTs for low noise and high linearity, respectively, has been suggested previously.1,2
Although previous works have shown that specially designed spiked- or delta-doped MESFETs can result in record IP3/PDC ratio figure of merits,3–5 the present work aims to reduce the cost, weight, size and integration complexity of the basic receiver RF chain by employing HBT technology to provide monolithic DC bias regulation while maintaining high IP3 compared to conventional HEMTs.1 Typically, off-chip silicon regulators are required to bias both HEMT and HBT amplifier ICs. These peripheral DC components, which consume most of the module size, are main contributors to the overall implementation cost. For example, each of the regulators and integrated discrete capacitors and DC bias resistors comprise approximately 20 times the area that an individual HEMT or HBT MMIC consumes. Moreover, as many as 30 off-chip lumped components, substrates and wirebonds must be employed to support the DC regulation of these single-function amplifier MMICs.
HBT technology can provide an elegant solution by integrating both of the bipolar IC regulators onto the HBT high IP3 amplifier MMIC, as shown in Figure 2 . In this configuration, an additional regulator is situated at the input side of the HBT MMIC in order to provide an inter-MMIC bias regulation solution for the preceding HEMT LNA MMIC by incorporating a few jumper wirebonds. Adding this voltage regulator results in a significant reduction in integrated component count and assembly cost, as well as a reduction in size while maintaining the performance offered by conventional hybrids. A size reduction of approximately 25 times is expected using this inter-MMIC bias approach, not to mention a reduction in component count and wirebonds of approximately 30:1. Thus, this strategic application of HBTs produces a low cost, practical solution that can result in significant benefits for satellite payload applications.
An HBT regulated Balanced Amplifier MMIC
The schematics of the HBT current regulators, which are applied to both the HBT amplifier and the HEMT LNA, are shown in Figures 3 and 4 , respectively.
Both regulators are self biased through a fixed 5 V supply and provide regulator loop gain Av greater than 50. The regulation performance over temperature and aging is enhanced by this gain factor over the resistive bias stabilization approach found commonly in monolithic HEMT and MESFET amplifier circuits.
The use of HBTs becomes ideal for regulator designs because they provide large operational amplifier gain using little DC power consumption due to the HBTs’ high DC transconductance per unit current, which typically is 6 to 10 times that of HEMT or MESFET devices. In addition, HBTs provide good DC threshold voltage matching between adjacent devices within 1 mV (1-sigma) and aid in reducing the error voltage between the noninverting and inverting inputs of the operational amplifier in the regulator design. A HEMT or MESFET device has threshold matching characteristics that are an order of magnitude greater than the HBTs and cannot provide the precision bias that the HBTs offer. The current regulation achieved by the HBT design is less than one percent over extreme threshold variations (±0.5 V) and temperature changes (0° to 100°C).
A block diagram of the chip that integrates a two-stage, 9 to 21 GHz, HBT high IP3 amplifier MMIC is shown in Figure 5 . This MMIC includes four single-ended HBT stages, each with its own HBT current regulator, and four additional regulators that can be bonded directly to a preceding balanced HEMT LNA chip, which may have as many as four amplifier sections. For each HEMT device of the LNA chip, there is a corresponding HBT current regulator located at the input side of the HBT amplifier. The use of multiple regulators allows for graceful degradation of the HEMT LNA MMIC over temperature and aging.
The HBT amplifier design is based on a 1 mm GaAs HBT technology that has fT » 43 GHz and fmax > 55 GHz. Typical DC current gains exceed 200 at moderate current densities, making the amplifier attractive for DC bias regulation. Figure 6 shows the detailed RF schematic of the HBT single-ended matched stage. The output of the single-ended amplifier block is broadband conjugate matched while the input is mismatched in order to maintain good gain flatness across the band. Each stage consists of two 1.5 x 10 m m2 four-finger HBTs in parallel for a total emitter area of 120 m m2 . Each of the four devices of the two-stage balanced amplifier is biased nominally at a Vce = 3.5 V and an Ice = 24 mA. The size and bias were selected based on gain, bandwidth, IP3 and reliability considerations.
Figure 7 shows a microphotograph of the HBT MMIC. The chip size is 3.7 x 3.1 m m2 and approximately 20 times smaller than a hybrid single-stage regulated MMIC implementation. Note the four additional current regulators at the input of the HBT balanced MMIC amplifier. These regulators are designed to regulate up to four HEMT device stages of a preceding HEMT MMIC LNA by employing a few short inter-MMIC wirebond jumpers no longer than 15 mils in length. This configuration provides a low cost bias regulation solution for the HEMT LNA, reducing its implementation area by another factor of 20 in addition to reducing part count and assembly cost dramatically.
The broadband gain and return loss performance of the regulated HBT balanced amplifier is shown in Figure 8 . Both input and output exhibit good return losses due to the use of a balanced Lange coupler design. The good broadband 50 W match, which, typically, has an SWR of better than 1.5, makes this design easy to cascade directly without the need for additional hybrid tuning or interstage padding. Stability also is a characteristic feature of the balanced design. These features make this topology ideal for commercial satellites where little expense and overhead are required in the insertion of these MMICs. Figure 9 shows the corresponding broadband IP3 performance, indicating IP3s as high as 29 dBm. Higher IP3s can be obtained using a narrowband matching network and load-pull data. However, the broadband response allows flexibility in design re-use in other applications, and reduces the concern over yield due to process variations. Figure 10 shows the broadband noise figure performance. The noise is approximately 6.5 dB across the octave band. The noise figure was compromised for gain flatness, which was achieved by mismatching the input of the single-ended amplifier cell. However, this noise figure is adequate for an intermediate-stage amplifier that follows a first-stage LNA with 10 dB gain or better.
The HBT balanced amplifier achieves a good combination of gain, IP3, noise figure and bandwidth using a two-stage balanced topology based on 1 mm GaAs HBT technology. The monolithic integration of HBT bias regulation to eliminate the requirement for off-chip regulators and peripheral components can result in a significant reduction in size, weight and cost of custom receiver chains intended for medium-volume commercial satellite applications. The Lange coupler balanced amplifier approach eases integration and provides good stability and process insensitivity. The monolithic HBT bias regulation capability can be exploited fully in an inter-MMIC bias regulation solution for adjacent HEMT MMICs. This bias regulator integration can result in the miniaturization of conventional microwave circuits used in satellite payload systems. This approach has strong implications for reducing cost and size of future phased-array systems where HBT control MMICs can be employed next to HEMT phase shifters, which also can use an interchip integrated solution.
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