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Macro File and Design Window Compression Load Pull Measurements
This article describes measurement and evaluation algorithms that allow full load pull tests to be performed while driving transistors automatically into desired gain compression and measuring a selection of parameters, such as output power, gain, efficiency, intermodulation, adjacent-channel power (ACP), DC bias and harmonic loads, as a function of input power. The Design Window evaluation software identifies load conditions for which a set of design requirements are fulfilled simultaneously. Examples of measured contours and three-dimensional surface plots are included.
Christos Tsironis Focus Microwaves Inc. Ville St-Laurent, Quebec, Canada
Apostolos Samelis and Klaus Buehring Rockwell Semiconductor Systems Newbury Park, CA
Accurate design of power amplifiers for cellular and personal communications service (PCS) applications imposes strict requirements on RF parameters, such as output power, gain, ACP and efficiency. For example, the chip area is determined by the transistor's compressed output power driving capabilities as well as the trade-offs between RF parameters under linear operating conditions. Such trade-offs are the result of the competing nature of RF parameters such as ACP and efficiency. In order to determine the optimum operating conditions, the devices must be tested under all possible source and load termination conditions and for power excitation levels covering the entire range from linearity to complete compression. Moreover, with all data available simultaneously, a measurement software must select the points that fulfill all RF requirements at the same time. These requirements are referred to as a design window since they determine if it will be possible to construct a targeted design using the specific transistor and what source and load impedances will be required in the amplifier design. This article describes the measurement and evaluation routines implemented in a standard computer-controlled microwave tuner (CCMT)-1808 load pull system that facilitate such a task.
As shown in Figure 1 , the CCMT load pull system includes two programmable tuners that operate from 0.8 to 18 GHz, an IBM PC-compatible tuner controller, a general-purpose interface bus (GPIB) interface, and calibration and measurement software. The tuners and other passive components in the setup, including the test fixture, are calibrated beforehand on a vector network analyzer. The network analyzer must be calibrated using a coaxial thru-reflect-line (TRL) technique for adequate accuracy. The load pull software allows for TRL calibration of the transistor test fixture and de-embedding of all measured data to the reference plane of the device under test (DUT). The calibrated system's overall accuracy is verified using the back-to-back method in which a thru line is inserted in the test fixture and the tuners are driven to complex conjugate impedances. The total gain then is measured close to 0 dB. The system is calibrated at 181 or 361 discrete points on the Smith chart up to reflection factors of 0.9 and can be used for several months without recalibration. The control software permits any interpolated impedance within the tuning range to be synthesized with an accuracy of better than 40 dB. Thus, the resolution obtained exceeds 10,000,000 impedances at 1 GHz. Fine-tuning is possible using the computer cursors, mouse or keyboard. Parasitic oscillations are practically eliminated because the tuners, having a lowpass behavior, present roughly 50 ohm to the transistors at all frequencies below 800 MHz. In addition to impedance tuning, the load pull software includes other unique features such as automatic search for maximum gain, output power and efficiency. This search does not involve load pull, but a direct gradient search with fine-tuning resolution. For the purpose of this work, a new algorithm has been developed that allows peak search of output power or gain under gain compression conditions. In other words, for each tuned impedance during the gradient search, the input power is swept until the transistor reaches the desired compression level. The power or gain then is measured and compared with the values measured previously to determine the direction of the next step in the search. Despite its complexity, this routine requires only a few minutes to converge and delivers very useful data, especially in source pull. Usually, these data can be obtained only by using alternate and lengthy compression source and load pull tests. The Macro File operation drives the complete measurement setup from a script (ASCII) file that can be generated either from inside the load pull system or by using a simple editor program such as Edit or Notepad. A multitude of macro commands allow for simple, medium and complex operations.1 Simple macro commands include keywords such as INIT (for tuner initialization), TUNE (for impedance synthesis), GPIB for direct GPIB control and more complex commands such as BIAS (for controlling the DC bias of transistors), PIN_POUT (for saturation measurements), PEAK (for automatic search of maximums) and C_PEAK (for searching maximums under compression conditions). The most complex macro commands include LOAD_PULL (for complete load pull with Pin = constant), COMPR_LP (for complete load pull at Pin levels up to X dB of compression in which all RF parameters are saved during the Pin sweep) and REG_LP (for constant Pout or drain current load pull). The Design Window evaluation software uses the measurement data obtained during the execution of the COMPR_LP macro command. FIND_OPT is an important system feature that allows the tuners to be adjusted to the optimum point determined during the latest measured load pull file for any specific measured parameter, such as intermodulation or ACP, efficiency or gain. A completely automatic operation without time or memory limitations is possible especially since the macro vocabulary includes the keyword FILE, which allows other macro files (= subroutines) to be executed. A complete list of macro commands is available.1
Compression Load Pull
The Macro File operation includes a set of commands that the system executes sequentially and a list of parameters that are measured and saved in sequence. If the first parameter in the list is the token GCOMPR (gain compression), then the input power will be swept to reach the desired compression status (for example, X dB) relative to a gain reference level for each tuned impedance. This level can be defined either as the small-signal gain or the peak gain in a gain-expansion characteristic. The last step of the power sweep is interpolated to obtain a compression as close to the target value as possible. Once the power sweep is interpolated, the parameters following in the macro file are measured and saved. In other words, all values are measured under X dB compression conditions. The Contour Graphics program then processes the data of two of the measured parameter values to ISO contours of any combination. Figure 2 shows a silicon bipolar transistor's load pull power contours at 1 GHz. The round contours correspond to a low and constant input power, whereas the elliptic contours represent the 1 dB compression point (P1dB) power contours. The significant effect of saturation can be observed. Figure 3 shows an overlap of ACP (sideband 1) and P1dB of a heterojunction bipolar transistor (HBT) at 836 MHz. The ACP and P1dB maxima are located approximately 180° apart and compression load pull is obviously the only way to identify an acceptable compromise.
Design Window Load Pull
The Design Window load pull algorithm consists of four steps. The tuner is moved to a load (source) impedance, the input power is swept from Pin, min to Pin, X dB , the selected set of RF parameters are measured and saved for each input power (use the COMPR_LP macro) and the last power step is interpolated to obtain close to X dB compression. These final data then are recorded. The selected set of parameters to be measured may include Pin , Pout , gain efficiency, IM distortion, ACP (average of each channel or all four upper and lower sidebands individually), DC power, input/output currents and voltages, and harmonic impedances. When the load pull routine has gone through all tuner points, which normally cover the complete Smith chart (or part of it according to a user-defined pattern), the data file can be processed by an evaluation program. This program displays the list of measured parameters with their minimum and maximum values and allows a set of targets to be defined for all or part of the parameters. For example, such a target can be ACP-1 > 46 dBc. The data file then is scanned for the impedance points and input power conditions at which all target values are satisfied simultaneously and those data points are saved in a Design Window file. These points can be displayed on the Smith chart together with the associated target values and can be modified on line using the CCMT control software. Figure 4 shows a Design Window example of HBTs operating at 836 MHz whose compression contours were illustrated previously.
The Test's Significance for Design Engineers
The Design Window evaluation technique is important in amplifier designs that involve several design targets simultaneously such as gain, Pout, efficiency, ACP and DC currents. In general, the load lines for output power, efficiency and ACP are functions of the input power as well as the test conditions under which they were measured. For example, the gain and output power contours coincide when the load pull measurement is performed under a constant input power level (conventional load pull measurement), but are located in different areas of the Smith chart when the load pull measurement is performed under compression conditions or constant output power conditions. The interpretation of load pull measurements obtained under such conditions can assist in the determination of circuit design conditions that, in the best case, meet only a limited number of the specifications. For example, the compression load pull contours can determine conditions that lead to maximum saturated output power or efficiency, or ACP, but not an optimum combination of the parameters. The load pull data also must be considered for a variety of input powers since the ACP and gain behave differently than the efficiency, and the best compromise for those quantities may not be at the PX dB input power level. Finally, conventional load pull measurements are difficult to correlate to realistic amplifier specifications since they are performed under constant input power levels and will not reveal the areas on the Smith chart where device linearity is best. Thus, it is time consuming to search through the large amounts of data produced by a conventional load pull system for an optimum solution that combines most or all of those design criteria. Design Window makes this search efficient. Complete data are available at any time and, even when modified specifications are issued, the designer has only to recall the data and apply the new target specifications to determine a new design window, that is, all source and load impedance conditions meeting amplifier specifications. Design Window is a powerful technique that allows almost-on-line negotiations on specifications with customers, giving a leading edge to any sophisticated amplifier supplier, especially in the cellular and PCS band, where cost is a prime consideration but linearity and efficiency cannot be compromised.
The CCMT load pull software has been measuring ACP ratio accurately since 1993. It supports all available spectrum analyzers from Hewlett-Packard, Anritsu, Advantest and Rohde & Schwarz. The software uses the AUTO option for spectrum analyzers equipped with this feature and the CUSTOM option for user-defined tests.2 The results presented in this article use a recent upgrade of this software, which allows a more accurate determination of signal power included in the code-division multiple access (CDMA) channel. This power can be determined over the entire (user-defined) bandwidth of the CDMA channel (typically 1.23 or 1.25 MHz). The two sidebands (typically at ±855 kHz and ±1.98 MHz off center frequency) also can be set by the user. The new routine allows for simultaneous or individual registration of power leakage into each of the sidebands and corresponding graphical processing of the measured load pull data into individual contours. In addition, a trade-off is possible between accuracy and speed since the user can determine the number of samples he or she wishes the routine to take inside the CDMA channel to determine the power. The routine has been applied on spectrum analyzers that include the AUTO option as well and has produced identical results. Thus, any older spectrum analyzer can be used to perform these measurements with state-of-the-art accuracy.
A number of AlGaAs/GaAs HBTs that can be used in cellular and PCS applications were measured. All tests were performed at a collector-emitter voltage of 3 V, at class AB bias operating conditions and while employing a CDMA excitation at 836 MHz. Prior to the Design Window compression load pull measurements, the source termination was optimized via available peak search routines. Nonlinear modeling of the HBT behavior that confirmed the accuracy of the measurement data and device models also was performed. Several plots and data listings show how the compression load pull and Design Window routines performed for the HBTs tested. The user can increase or decrease the displayed target values by pressing the associated F keys (F1 F7) or shift-F1 to shift-F7. Then, on line, the operator can scan through the complete data file by pressing F10 and plot all valid points on the Smith chart. At this point, the points that satisfy all target conditions given by the specifications can be identified or, alternatively, all targets can be moved, one by one, to their highest acceptable limit for the number of valid impedance points required. In this particular example, only three impedance points satisfy all target values at once. The target values include Pout, efficiency, gain, ACP-1 and ACP-2, and input and output DC current. The design window shown represents the optimum trade-off at the load plane between the measured RF parameters at the particular bias, frequency and source termination conditions according to the predetermined power amplifier specifications. Appendix A shows the contents of the Design Window file discussed previously. The data show that all conditions can be fulfilled at each load impedance point for more than one level of input power and that the conditions are not necessarily fulfilled at all points for the same input power, confirming the earlier claim that a power sweep is necessary to identify the optimum conditions in a multiparameter load pull data file. In other words, load pull tests based on a single input power level are not adequate to identify the optimum conditions of a multiparameter test. The parameter Pt indicates which load impedance point has been tuned to (out of 361 calibrated points). The target values to be fulfilled simultaneously to generate the Design Window file (.DWN) are Pout > 20.4 dBm, gain >19.5 dB, efficiency > 35 percent, ACP-1 > 46.2 dBc, ACP-2 > 55 dBc, base current < 0.1 A and collector current < 1 A.
Transistor Behavior Visualization Using Three-dimensional Plots
The three-dimensional surface plot capability of the CCMT graphics is useful for visualizing the qualitative behavior of transistors in load pull tests. The surfaces generated identify any oscillations or other anomalies immediately and help the operator gain a better understanding of the two-dimensional contour plots. Due to mathematical smoothing used in all two-dimensional contouring algorithms, certain characteristics of the device behavior may be lost because some users prefer to see smooth contours that correspond to their expectations. Three-dimensional surfacing of the CCMT software does not smooth out any point. This procedure shows the reality as it is. Figure 5 shows the general behavior of ACP sideband 2 over the load impedance at 1 dB gain compression for the tested HBT at 836 MHz. In fact, two areas of high ACP-2 are observed, including one area close to the maximum power at low impedances and one area opposite to it at high inductive loads. Figure 6 shows (for the first time) an HBT's general behavior of gain expansion. Gain expansion is defined as Gmax - Gmin during the input power sweep at every load impedance. Gain expansion is a significant indication for the device's linearity and identifies the area of the Smith chart where the load conditions drive the device into class C operation. (Gain expansion is typical for class C operation.)
A compression load pull measurement and Design Window evaluation routine has been presented that allows knowledge to be obtained quickly on the capacity of DUTs to fulfill target specifications in a realistic large-signal operating environment. Results have been presented for combined conditions such as Pout > target 1, ACP > target 2, efficiency > target 3, I-base < target 4 and I-collector < target 5 (all target values being user defined). For the first time, the software enables the unique determination of trade-offs between output power, efficiency and ACP for a particular transistor at all allowed load impedances and input power levels.
1. "Macro File Operation Software," Application Note 28, Focus Microwaves, 1996.
2. CCMT Operation Manual, software version 5.2, January 1997.
THE DESIGN WINDOW FILE
!DESIGN WINDOW DATA FILE = C:\CCMT\DATA\TEST.DWN
!data from following .LPC file:
!Load Pull Measurement Data
!File = C:\CCMT\DATA\TEST.LPC
!Date = Thu Jun 05 18:39:18 1997
!Comment = Measured from Macro File..
!Frequency = 0.8360 GHz
!Char. Impedances = Source: 50.00 W, Load: 50.00 W
!Source Impedance = 9.68 +j 13.38 W
Pt R[W] X[W] PIN POUT GAIN EFF ACP-1 ACP-2 I-INP I-OUT
074 16.75 -3.48 -1.209 20.626 21.835 36.445 47.415 58.080 0.002 0.106
075 16.39 -9.86 -0.149 20.683 20.832 38.241 46.334 59.595 0.002 0.101
099 11.81 -5.83 0.841 21.535 20.695 35.226 47.195 58.793 0.003 0.133
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