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Software/EDA Channel / Industry News

Agilent's ADS controlled impedance line designer solves key challenges in designing chip-to-chip links

January 27, 2014
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Agilent Technologies Inc. introduced Agilent EEsof EDA’s Controlled Impedance Line Designer. The software product quickly and accurately optimizes stack up and line geometry for multigigabit-per-second chip-to-chip links, using the most relevant metric.

The product, available as an add-on to Advanced Design System 2014 uses a novel approach to design controlled impedance transmission lines. Previous tools for this task allowed only for line characteristics, such as frequency response, as the optimization goal. In modern chip-to-chip links, this metric has become less relevant because it doesn’t take holistic effects of the end-to-end link into account. Most important, the effect of the equalizer in the receiver is ignored. The metric that matters today is the post-equalization eye opening.

The integration of Agilent’s Controlled Impedance Line Designer and the existing Channel Simulator in ADS rectifies this situation by letting engineers see a set of eye openings that result from sweeping through the pre-layout design parameters (e.g., line width).

To ensure accurate calculation of the transmission line characteristics, the software automatically employs a fast, cross-sectional (2D) electromagnetic field solver. The dielectric layers are modeled using the frequency-dependent Svensson/Djordjevic permittivity, which ensures both accuracy and delay causality. The metal layer model accounts for conductivity, skin effect, and top and bottom surface roughness.

The Controlled Impedance Line Designer also includes a provision to determine the effect of manufacturing variation on input parameters, such as thickness on the output parameters (e.g., impedance).

“This new approach brings line design into the multigigabit era,” said Colin Warwick, product manager for high-speed digital design at Agilent EEsof EDA. “The whole point of the signal processing in the I/O of modern chips is to allow you to use lower-cost materials and yet still open the eye. For the first time, engineers can easily explore those interactions and trade-offs.”

U.S. Pricing and Availability

Agilent EEsof EDA’s Advanced Design System 2014 with the Controlled Impedance Line Designer software add-on will be available in February 2014. Pricing is dependent on the exact configuration desired.

Agilent also offers a wide selection of high-speed digital solutions, including essential tools to pinpoint problems, optimize devices and deliver results for design and simulation.

Agilent will demonstrate the Controlled Impedance Line Designer software for the first time in Santa Clara at DesignCon 2014, Jan. 28-31, Booth 201, along with its other high-speed digital solutions.

More information on the Controlled Impedance Line Designer software is available at www.agilent.com/find/eesof-ads-cild. An image of the software is available at www.agilent.com/find/CILD_images. For a video highlighting the new software add-on for ADS 2014, go to http://youtu.be/wdlAAQgLJsc.

About Agilent EEsof EDA Software

Agilent EEsof EDA is the leading supplier of electronic design automation software for microwave, RF, high-frequency, high-speed digital, RF system, electronic system level, circuit, 3-D electromagnetic, physical design and device-modeling applications. More information is available at www.agilent.com/find/eesof

Recent Articles by Agilent Technologies Inc., Santa Clara, CA

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