**Military Microwaves Supplement**

Space Fence Radar

Characterization of Single-Shot Large-Signal Phenomena

Device and PA Circuit Level Validations

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April 1, 1997

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**Randall North and David Kennedy**

**Optotek Ltd.**

*Kanata, Ontario, Canada*

**Mike Murphy**

**M/A-COM, Microelectronics Division**

*Lowell, MA*

In the course of a typical MMIC development and manufacturing program, there are a number of common issues that affect design success as it relates to manufacturability. Even when specific designs are considered successful (in the sense that working MMICs are fabricated), the circuit and wafer yields must be improved to make system insertion affordable. To improve yields and device performance, the necessary steps of process and device enhancements can be completed. However, process development is long term in nature and expensive, and any results must be validated prior to production. There is much to be gained by applying computer-aided engineering (CAE) techniques to enhance circuit and wafer yields, thereby compensating for the influence of the statistical foundry process variation.

Currently, the development cycle for new products based on GaAs MMICs typically involves multiple processing runs through a foundry organization in order to improve the production yield. The development of CAE software incorporating statistical design centering methodologies (based on the technological constraints imposed by a foundry) reduces overall cost and time, thereby providing significant system insertion advantages. Technical limitations exist in the current generation of CAE software for predicting MMIC and wafer yields. To date, no formalized methodology is available in CAD software to provide tight integration between circuit simulations and wafer-level data for yield. The capabilities of the MMICAD^{TM} linear simulator have been extended recently to add a new database sampling technique, which can be used to model MMIC yields accurately. This feature is incorporated in version 2 of MMICAD for Windows^{TM} . The approach uses a database of equivalent circuit models, developed through data gathering of routine in-process measurements of process control monitor (PCM) devices. This approach differs from traditional statistical modeling, which simply assigns a probability distribution to each model element during statistical analysis. Database sampling uses measurement-based equivalent circuits for each sample run of the Monte Carlo simulation.

By applying the unique combination of active device yield simulation through database sampling and passive element yield simulation through statistical modeling, important yield issues are addressed and their impact is reduced dramatically. The approach is discussed in the context of the manufacture of a 1.6 GHz low noise amplifier (LNA) MMIC. However, the techniques explained are widely applicable for MMIC design at all frequencies.

A useful concept to aid sensitivity analysis, circuit variable tolerancing and design centering is the yield factor (YF) associated with the value of each circuit variable. For circuit variable X, YF is defined as the Monte Carlo yield estimate with all circuit variable values except X varying randomly according to the probability density function. A plot of YF(X) as X is varied through its allowed range of values would result in a graphical display of yield vs. parameter values. If the YF(X) plot is constant with respect to the acceptable range of X values, then the circuit yield is not sensitive to X.

An example of a yield analysis that is sensitive to X is shown in ** Figure 1 ** . Yield, which is displayed on the y-axis, improves as X is increased. An example of a circuit variable that is insensitive to X is shown in

*Fig. 1: An example sensitivity plot showing yield increasing as a function of R4.*

*Fig. 2: A sensitivity plot of circuit yield that is insensitive to variable C1.*

This approach to MMIC yield prediction relies on the statistical representation for all circuit variables that influence circuit yield. For passive components, this approach typically involves assigning a probability function to the component. For active components (MESFETs or psuedomorphic high electron mobility transistors), this involves developing a statistical representation for the measured data (for example, HP-EEsof's TRUTH model). A Monte Carlo analysis is performed to develop an approximation to the circuit yield. The advantage of this approach is that a compact representation of parameter variability is obtained. The disadvantage is the difficulty of maintaining this statistical model practically for active devices in normal foundry operations.

Part of the MMICAD simulator circuit file VAR block for a MMIC amplifier is shown in Appendix A. Both resistors and capacitors were given a uniform 10 percent variation. Statistical analysis shows that the passive elements do not contribute significantly to overall circuit yields since relatively low sensitivities are predicted, as shown in ** Figure 3 ** .

*Fig. 3: An amplifier sensitivity plot showing circuit insensitivity to passive component variations.*

This database sampling approach to MMIC yield prediction involves sampling a measured database of modeled equivalent circuit parameters. In practice, because conventional statistical models have been found to be adequate for passive components, database sampling is applied usually to active device data. The modeled device database can be tailored to a particular MMIC design (bias point or transistor size). A Monte Carlo analysis is performed to develop an approximation to the circuit yield. The advantage of database sampling is that measured data are used in every Monte Carlo run. No statistical model of the device is needed, resulting in highly accurate yield prediction. In effect, the database becomes the statistical model.

The data used in this example are from a completed study using production MESFET foundry data. Using routinely measured DC and microwave characteristics of the PCM MESFET at several bias points, the small-signal equivalent circuit parameters were extracted and this information was stored in a database. The MMIC designer can interrogate this database to extract information on the specific MESFET to be used in the design (bias point, transistor size, lot and run). For the MMIC LNA design being considered, a sample lot of measured data on a 300 micron (4 × 75 micron) MESFET was extracted from several months of manufacturing runs. The small-signal equivalent circuit used for the MESFET database is shown in ** Figure 4 ** . Nominal bias conditions of V

*Fig. 4: The small-signal equivalent circuit used for database sampling of the MESFET process.*

In database sampling variational analysis, a different entry from the database is selected for each case. Since each instance of the FET model is based on actual measured data, there is no concern about whether one parameter, such as C_{gs} , is correlated to another (for example, _{gm} ). Also, equivalent circuits have the distinct advantage of being scalable to different gate widths more easily than S-parameters. (Scaling is performed using well-known relationships.) In addition, if noise figure performance of the device was modeled by on-wafer measurements, then a FET model with built-in noise parameter support such as MMICAD's FETN can be used to provide statistical simulation of noise figure as well. This concept is illustrated for an L-band MMIC LNA.

The nominal performance of the L-band MMIC amplifier used for yield prediction development is shown in ** Figure 5 ** . MMICAD then was used to conduct a variational analysis using the nominal values of the passive components, and the lines of the data files were read sequentially. The results are shown in

*Fig. 5: The MESFET sensitivity analysis.*

*Fig. 6: The MESFET sensitivity analysis results.*

The numerical results of the Monte Carlo simulation for yield are shown in ** Figure 7 ** . As indicated in the dialog box, a total yield of 96.9 percent is predicted for this circuit. The database sampling approach cannot predict yield dropout due to single-point failures in processing such as handling damage or scratched traces. For similar reasons, yield dropout at DC testing also cannot be estimated. On this particular amplifier, for reasons of production efficiency, DC screening is not performed prior to packaging. At final test, no separation of DC/RF yield dropout is performed. The actual combined DC/RF yield for this device is 92 percent. Therefore, the RF yield of 97 percent predicted by database sampling is quite plausible.

*Fig. 7: The yield after 7000 trials.*

The use of measured data in database sampling avoids the accuracy limitations of statistical MESFET modeling for MMIC design centering. MMICAD's design centering technology can reduce cost and improve time to market by eliminating the need to perform expensive design iterations.

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