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Envelope Tracking Fundamentals and Test Solutions
There was once a time when your cell phone could go for days without needing to be recharged. Today, despite the innovations in cell phone battery technology, new demands, such as more internal radios and larger and higher resolution screens, place a greater drain on battery life than ever before. As a result, engineers must consistently innovate to reduce the power consumption as new technology is added to a cell phone. Today, envelope tracking (ET) is an increasingly popular technique used to optimize the power-added efficiency (PAE) of the RF power amplifier (PA) which is one of the primary drains on battery life. This article covers the fundamentals of ET using data gathered from an RF PA to identify crucial ET parameters. Based on these parameters, a PXI-based measurement setup is proposed and analyzed that meets the stringent requirements of ET test.
PAs are most efficient when they are operated at peak output power, where the gain enters compression. For a typical W-CDMA/HSPA+/LTE PA, it is possible to obtain up to 50 percent efficiency when the device is operating at peak output power. However, much of the efficiency is reduced because modern communication standards such as W-CDMA and LTE use modulated signals with increasingly higher peak-to-average power ratios (PAPR). Moreover, because the amplifier’s magnitude response becomes highly nonlinear at compression, its output power is typically ‘backed off’ from the peak power by the PAPR. For LTE waveforms, the PAPR can be as high as 7 or 8 dB resulting in a PA that is operating at an average output power well below its optimum value.
While several techniques can be used to improve the PAE of the amplifier, digital predistortion (DPD) for example, ET is quickly gaining traction amongst commercial PA vendors. In fact, base stations have been employing ET for over a decade in order to not only increase efficiency, but also to reduce cooling requirements due to energy dissipated as heat.
Principles of ET
The principle behind ET is to operate the amplifier in compression as often as possible. This technique makes use of the fact that both the point of peak efficiency and the point of peak output power vary as the supply voltage changes. To illustrate this point, Figure 1 displays PAE as a function of output power for several Vcc values. The trend we observe is that the output power of peak efficiency increases with an increase in Vcc.
The basic idea of ET is to map instantaneous output power to an optimal Vcc value thereby maximizing the time the amplifier spends on the edge of compression. The theoretical PAE using ET for this particular amplifier is shown in Figure 1 as the green trace. As illustrated, the effective PAE is substantially better than the actual PAE when using fixed supply voltage. Based on this data, we can create a simple lookup table (LUT) that maps output power to a PAE optimized Vcc value (as shown in Figure 2). Note there is a lower bound placed on the Vcc signal at 1 V. This boundary has bandwidth implications explained later.
While the idea of modulating the Vcc signal to maximize PAE is good in theory, this is difficult to execute in practice. A consequence of varying Vcc as a function of output power is that the amplifier’s gain will dynamically change as Vcc is changed, thus increasing AM-AM distortion. This effect can be reduced by using a smaller range of Vcc levels, which leads to a design tradeoff between PAE and AM-AM distortion. DPD algorithms can be applied to the baseband RF waveform in order to correct for additional distortion introduced by ET.
The PAE results shown in Figure 1 were based on a continuous wave signal. Using these values and the probability density function (PDF) of power P(Pout) for a particular waveform, an expected PAE for a modulated signal can be estimated, as shown in equation 1.
For use in this equation, Figure 3 shows the PDF for a test case 1 W-CDMA waveform with an average RF power of 0 dBm. By shifting this waveform to a specific average output power, we can estimate the efficiency of the amplifier with this particular modulated signal.
This calculation treats PAE as a random variable and assumes that the PAE vs. Pout measurements are static, i.e., they do not vary in time. While the calculation in equation 1 gives us a good approximation of PAE, actual PAE can vary slightly over time due to memory effects present in the amplifier and gain variation due to temperature. Figure 4 shows the measured vs. calculated PAE for the test case 1 W-CDMA modulated waveform at a fixed Vcc as well as the expected PAE under ET conditions assuming an ideal Vcc modulator. Note that the expected and measured PAE curves are very close and only begin to diverge at higher output powers. The discrepancy can most likely be attributed to memory effects within the PA. Comparing the expected PAE for an ideal ET power supply (green curve) to the measured PAE for a fixed supply (blue curve), we see that ET could theoretically achieve twice the efficiency over a wide range of output power.
While ET promises considerable efficiency improvements, one must be aware that there are many tradeoffs involved with ET PA design. In fact, optimizing for one parameter will require tradeoffs of other parameters in the system. As a result, the design process of choosing the optimal Vcc levels for a given output power is highly iterative and necessitates the ability to quickly and reliably test design decisions.
ET Test Challenges
ET test adds another element to an already complex system. In order for a PA to successfully implement an ET scheme, careful synchronization between the RF baseband waveform and the supply voltage is required. As shown in Figure 5, a typical ET test system uses an RF signal generator and analyzer, a high-speed digital waveform generator for controlling the PA, and a power supply to power the amplifier.
One significant test challenge of ET is the high bandwidth required for the power supply waveform. The bandwidth requirements for the envelope waveform are typically far greater than those of the RF waveform. To analyze this phenomenon, consider the Vcc vs. Pout LUT shown in Figure 2 and an LTE 10 MHz bandwidth signal. Figure 6 shows the PAE optimized Vcc waveform and the associated power vs. time plot for the corresponding LTE signal. A spectral analysis shows that the bandwidth of the Vcc waveform is at least three times more than that of the RF waveform. The high bandwidth requirement is due to two factors: one, Vcc is a function of RF magnitude and two, clipping occurs due to the lower bounds imposed in the LUT, as seen in Figure 2.
In fact, for a 20 MHz LTE waveform, the Vcc waveform should have at least 60 MHz of bandwidth – a result shown in Figure 7. Moreover, in cases where wideband DPD is applied, the bandwidth requirements of the Vcc waveform are often up to five times the bandwidth of the actual RF signal. As is discussed in the next section, it is not enough that an arbitrary waveform generator (AWG) is capable of wide bandwidths, but it must also have excellent time resolution.
A second challenge with the supply voltage is that AWGs cannot supply enough current to power a PA, and power supplies do not have the bandwidth required for ET. The solution to this problem is to drive the PA with a power modulator that is driven by a DC source and modulated Vcc signal from an AWG, as shown in Figure 5.
The most difficult ET test challenge is ensuring instrument synchronization between the RF signal generator and the AWG. Since maximizing the PAE of the PA occurs when we choose an optimal Vcc value based on the input power, poor synchronization between these instruments will result in having a Vcc value that is either too high or too low for any given output power.
Consider what would happen if the Vcc waveform lags the RF: the power modulator will not be able to supply enough power to the device when the waveform is at peak power. As a result, the RF output would clip several dB below the desired output power. Furthermore, immediately following a waveform peak, the power modulator will be supplying much more power than the amplifier requires, thus reducing efficiency. A similar situation occurs if Vcc leads the RF. The RF signal generator and AWG must not only be synchronized, but the synchronization should also be repeatable.
A PXI-Based Test Solution
Instrument synchronization is a crucial specification of an ET test setup. Because of the stringent synchronization requirements, the PXI platform is well suited to solve the challenges of ET test. In a PXI test system, modular instruments are interconnected through a chassis backplane containing a number of clock and trigger distribution lines. This single chassis integration simplifies the instrumentation setup and improves system synchronization.
ET PAs typically have to operate with an RF signal generator and Vcc synchronization jitter less than 1 ns, which requires the test setup to be considerably better – preferably in the order of 100 ps. PXI allows for tight synchronization with the use of a ‘T-Clock’ backplane synchronization routine. ‘T-Clock’ is a mechanism for aligning sample clocks and starting triggers such that all devices begin generating simultaneously. For example, the NI PXIe-5451 AWG and the NI PXIe-5644R vector signal transceiver were benchmarked with maximum synchronization jitter less than 50 ps, and therefore meet this requirement.
Synchronizing the RF signal generator and AWG is only half the challenge. The modulated Vcc signal and RF waveforms go through different paths before reaching the amplifier and therefore experience different delays. Thus, it is also important to programmatically delay or advance the Vcc waveform relative to the RF signal in order for the modulated power supply and RF signal to be aligned with sub-nanosecond skew at the amplifier.
A simple way to delay the Vcc signal relative to the RF signal by an integer multiple of the AWG samples is to insert ‘wait’ cycles in the beginning of the generation script. In order to get more precise delay, the RF waveform can be shifted in software or in hardware on the vector signal transceiver’s FPGA using a digital filter. The advantage of the hardware solution is that it can perform the time shift much more quickly than the equivalent software filter, thus reducing the amount of time it takes to identify the optimum alignment between the AWG and vector signal transceiver. At the nominal Vcc sample rate of 400 MS/s, an arbitrary delay with picosecond resolution can be attained.
The final piece of test equipment required for this measurement setup is a power supply capable of source and measurement. A battery simulator – as opposed to a standard source measure unit (SMU) is usually preferred for this application due to the high slew rates required by PAs. Note that in some instances, a high-speed digital waveform generator capable of generating patterns up to 26 MHz at 1.8 V is also required for digital control of an MIPI-capable PA.
The most direct method of verifying synchronization of the Vcc and RF signals is with a high-bandwidth digitizer. In this example, the NI PXIe-5644R vector signal transceiver and NI PXIe-5451 AWG were connected to two channels of a 2.5 GS/s digitizer. The vector signal generator generated a 10 MHz LTE FDD uplink waveform at 800 MHz using the Vcc vs. Pout LUT shown in Figure 2. On the initial run, the two waveforms are roughly 1 µs out of sync with one another due to pipeline and DSP delays within both instruments. Using the delay algorithm described in the previous section, both waveforms can be aligned through a combination of wait samples and sub-sample delays.
Figure 8 shows these results with the Vcc waveform scaled so that it has a magnitude comparable to the RF waveform. The graph shows the two waveforms aligned with one another but, more importantly, this relationship holds between successive runs of the application, even after power cycling the system.
A high-speed digitizer is useful for visually inspecting the alignment of the two waveforms at the input of the amplifier, but it does not measure the performance of the amplifier. As we learned in the previous section about the importance of synchronization, Vcc and RF misalignment severely affects the linearity of the amplifier. For this reason, it is also possible to use an adjacent channel power (ACP) measurement to evaluate the optimal alignment of Vcc and RF. The amount of ACP degradation is device specific but users can expect to see a significant improvement in this measurement using an RF signal analyzer when the synchronization is optimally calibrated.
Within the past decade, ET in cellular base stations has proven itself to be an effective means of increasing power amplifier efficiency and reducing cooling requirements due to wasted energy dissipated as heat. As wireless standards have continued to evolve, mobile handheld device manufacturers are looking to leverage ET for these same benefits as well. While ET promises considerable power savings and extended battery life over conventional fixed power supplies, it does propose significant instrumentation challenges to PA designers and test engineers. The PXI-based test solution presented here addresses the most crucial measurement challenges and, based on measured results, makes it a very compelling ET PA test solution.