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Texas Instruments Inc. introduced a pair of devices supporting the JEDEC JESD204B serial interface standard for data converters. The ADS42JB69 is the industry’s first dual-channel, 16-bit analog-to-digital converter (ADC) featuring the JESD204B interface and is also the fastest at 250 MSPS. The LMK04828 is the industry’s highest-performance clock jitter cleaner and is the first to support JESD204B clocking. When used together, the devices provide unmatched system-level performance for high-speed systems. For designs requiring a traditional parallel interface, the company also introduced the ADS42LB69, the industry’s fastest dual, 16-bit ADC at 250 MSPS featuring an LVDS interface. For more information and to request samples, visit www.ti.com/jesd204b-pr.
JESD204B is an industry-standard serial communications link that simplifies the digital data interface between data converters and other devices, such as FPGAs, DSPs and ASICs. The standard reduces the routing between devices, slashing input/output and board space requirements for applications, such as wireless communications, test and measurement, and defense and aerospace.
The ADS42JB69 maximizes flexibility in system design, because it is the only 16-bit ADC incorporating all three JESD204B subclasses, 0, 1 and 2, allowing multi-device synchronization between data converters. The ADS42JB69 also supports the new JESD204B standard for deterministic latency, which provides fixed transmission delay with or without the use of an external timing signal. The device is also compatible with the existing JESD204A standard.
Combining the 16-bit ADS42JB69 with the LMK04828 provides an elegant and simple way for system designers to achieve JESD204B serial interface compliance with reduced bill of materials (BOM), along with unsurpassed performance. The LMK04828 provides ultra-low-jitter and phase noise, while generating the JESD204B subclass 1 system timing reference signal (SYSREF) required for multi-device synchronization.
Key features and benefits of the LMK04828
o Dual voltage-controlled oscillator cores operating at 2.5 GHz or 2.9 GHz enable maximum flexibility by providing seven pairs of programmable clock outputs set as LVDS, low-voltage positive-emitter-coupled logic (LVPECL), or high-swing differential signaling (HSDS) output formats.
o Output pairs can be configured as a device clock and SYSREF, or as two device clocks for implementing additional high-speed clocks to meet system requirements.
Tools and support
The following evaluation modules (EVMs) are available to speed development with the new 16- and 14-bit, 250 MSPS ADCs:
The EVMs connect to the TSW1400EVM High-Speed Data Capture and Pattern Generation Platform for data analysis, as well as FPGA development platforms from Altera and Xilinx. IBIS models for the ADS42LB69 and ADS42LB49 are also available to verify board signal integrity requirements.
The LMK04828EVAL evaluation module can be purchased today for US$499. The Clock Design Tool and CodeLoader software offer product selection, design and simulation of timing solutions.
Support is available on the High Speed Data Converters and the Clocks & Timers Forums in the TI E2ETM Community, where engineers can ask questions and get answers from TI experts.
Samples of the 16-bit ADS42JB69 (JESD204B) and ADS42LB69 (LVDS), and 14-bit ADS42JB49 (JESD204B) and ADS42LB49 (LVDS) are all available today in a 9-mm by 9-mm QFN package. Production quantities are expected in 2Q 2013 with 1,000-unit budgetary pricing of US$185 for the ADS42JB69 and ADS42LB69 and US$125 for the ADS42JB49 and ADS42LB49.
Samples of the LMK04828 are available today in a 9-mm by 9-mm QFN package. Production quantities will be available in 1Q 2013 for a suggested retail price of US$11.20 in 1,000-unit quantities. For systems requiring VCOs operating at 1.9 GHz or 2.5 GHz, the LMK04826 will be sampling in early 1Q 2013 with production quantities available later in the quarter for US$11.20 in 1,000-unit quantities.
Learn more about TI’s data converter and clock portfolios by visiting the links below:
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