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Agilent to showcase high-performance 32 Gb/s bit error ratio tester at ECOC
Agilent Technologies Inc. announced it will demonstrate a 32-Gb/s bit error ratio tester at ECOC (Amsterdam RAI, Hall 1, Stand 712) in Amsterdam, Sept. 17-19.
The N4960A high-performance modular bit error ratio tester (BERT) is suitable for product design, device characterization and production test of devices and systems operating up to 32 Gb/s. The instrument is available in 17-Gb/s and 32-Gb/s configurations. The N4960A is excellent for 100G Ethernet, CEI 28G VSR and 32G Fibre Channel applications.
“The Agilent N4960A 32-Gb/s BERT offers high-performance receiver testing beyond 28 Gb/s at a new level of affordability,” said Juergen Beck, general manager of Agilent’s Digital Photonic Test Division. “This and some other new products round out our portfolio of BERT instruments, covering all applications from cost-sensitive production test to the highest performance instruments needed for advanced research.”
The pattern generator and error detector, which operate at full rate speed without external multiplexers or demultiplexers, are configured as small remotely mountable heads. They attach to the half rack-wide BERT controller with one-meter cables, which pass clock signals, control communications and power to the heads. The pattern-generator output and error-detector input are generated and processed directly in the heads, close to the connectors. This configuration minimizes cable lengths and associated signal degradation between the heads and the device under test.
The pattern generator provides hardware-generated PRBS patterns, as well as user-defined patterns up to 8 Mb long. A library of common telecom and datacom stress patterns is included. A powerful pattern-editing tool simplifies the process of generating and modifying user patterns. Users control the system with Signal Integrity Studio software, which is included with the instrument. The software provides an intuitive setup and control interface to simplify operation.
100G Ethernet applications that require four lanes of 25.78 or 28+ Gb/s data are addressed with four single-channel systems. The four-channel configuration can be configured to operate with a single synchronous clock or four asynchronous clocks. Other four-channel BERTs operate only with synchronous clocks, which makes it impossible to verify communication ASICs such as gearbox chips with independent clocks – a requirement in some of the standards.
The modular configuration allows users starting their initial 100G designs to purchase a single-channel BERT to bring up the basic 28G link design. Once the basic link is stable, the user can purchase the remaining three channels needed for 100G operation, thereby minimizing upfront capital expenditures. For devices with built-in error detection and counting capability, the N4960A can be configured with pattern generation only.
The N4960A modular BERT offers a high level of performance at an affordable price. It is one of the new products from the Centellax Test and Measurement business that Agilent acquired in May 2012. The new BERTs use custom ASICs with a high level of integration. These components, available only from Agilent, dramatically lower the total parts count, thus reducing cost and improving reliability.
Additional information about Agilent products that will be demonstrated at ECOC is available at www.agilent.com/find/ecoc2012.
U.S. Pricing and Availability
Available now, Agilent N4960A BERTs start at $161,060 for the 32 Gb/s configuration
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