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Industry News

A Low Cost RF Transceiver for 2.4 GHz DSSS Short-range Communication Systems

In this article, the design and experimental results of a low cost RF transceiver for short-range wireless systems are described. The transceiver is composed of a direct Gaussian frequency shift keying (GFSK) modulation transmitter and a dual conversio...

June 14, 2004
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The development of short-range wireless systems has captured the industry’s imagination for several decades.1 Many of these systems operate at the internationally available unlicensed industrial, scientific and medical (ISM) 2.4 GHz frequency band. The attraction of these systems is that they can offer low cost, small physical size (single chip) and low power consumption. Some systems, like Bluetooth, utilize frequency hopping spread spectrum (FHSS) technology, where the system will frequency hop 1,600 times a second, delivering short time division multiplexed packets with each hop. With spread spectrum hopping, the sequence is random and the receiver must hunt down the chosen transmission frequency after each hop. Some systems, like the IEEE 802.11 Wireless Local Area Networks (WLAN), utilize direct sequence spread spectrum (DSSS) technology, which spreads the signal over several frequencies, and can switch channels to avoid interference.

A low cost, miniature-size, high performance RF transceiver is an important component in these systems. Many short-range RF transmitters utilize direct FSK modulation to simplify the RF circuitry. In these systems, the VCO is directly modulated with the transmit data. To improve the isolation between the RF power amplifier and the VCO, the VCO usually operates at a lower frequency, and a frequency-multiplier is used to convert the VCO frequency to the transmitting frequency. Because the frequency-multiplier produces many unwanted spurs, its performances, such as efficiency and spur rejection, are of great importance. For further spur rejection, additional RF bandpass filters are generally needed. Therefore, the frequency-multiplier and RF filter should be carefully designed and optimized to satisfy the specifications. The RF receivers utilize a dual conversion architecture for high sensitivity and selectivity. The functional diagram of the RF transceiver investigated in this article is shown in Figure 1.

Fig. 1 Block diagram of the 2.4 GHz transceiver.

Frequency Tripler

The schematic of the frequency tripler is shown in Figure 2. Generally, there are two basic sections of the frequency-multiplier: the harmonic generation section and a filter section.2,3 The high frequency transistor Q1 serves as the harmonic generator. C1 and L1 form the input-matching network. L2, C3 and C5 serve as the output-matching network and the filter section. R1, R2, R3, C2, C4, C6, L1 and L2 form the bias network.

Fig. 2 Schematic of the frequency tripler.

The performance of the frequency tripler is mainly determined by the input and output matching networks. The function of the input-matching network is to ensure that the RF transistor is excited adequately enough to generate harmonic components. The output-matching network usually resonates at the required harmonic frequency to reject unwanted harmonics. To achieve high performance, the tripler should be optimized. The harmonic balance method is a suitable and powerful approach for simulation and optimization. The simulated results of the frequency tripler, output waveform and spectrum are shown in Figure 3.

Fig. 3 Simulated results of the frequency tripler; (a) output waveform and (b) output spectrum.

The third harmonic is generated and the fundamental frequency and other harmonics are rejected. The frequency tripler is excited with an 800 MHz CW signal at the level of 0 dBm. The output level at 2.4 GHz is –3 dBm, and the level of unwanted harmonics is less than –9 dBm. To satisfy the emission specification, additional filters are employed. Microstrip interdigital filters, which have the properties of small size, low insertion loss and good out-of-band rejection, are suitable for the transmitter.

LNA Design

The schematic of the LNA is shown in Figure 4. The LNA is composed of a low cost RF BJT, bias circuits and matching networks. Its performance is optimized for noise figure, gain, and input and output return losses.

Fig. 4 Schematic of the LNA.

The simulation and optimization of the LNA is carried out with Agilent ADS. The simulated noise figure is less than 1.4 dB, the power gain is about 10 dB, and the input and output return losses are better than –12 dB in the frequency range from 2.4 to 2.5 GHz (see Figure 5).

Fig. 5 Simulated results of the LNA; (a) gain, (b) input return loss, (c) output return loss and (d) noise figure.

Experimental Results

A 2.4 GHz short-range RF transceiver was developed using the frequency tripler and the described LNA. It is a DSSS transceiver with GFSK modulation in the frequency range of 2.4 GHz. The data rate is 1.5 Mbps. The output spectrum of the transmitter is shown in Figure 6.

Fig. 6 Measurement of the transmitted RF with a frequency tripler.

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