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Software & CAD

Analog Office

January 17, 2011
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The Analog Office® design suite is the first complete design system in over 10 years that is specifically architected and optimized from the ground up for analog and radio-frequency integrated circuit (RFIC) designs. Much more than a point tool, the Analog Office integrated solution boasts an industry-first, concurrent interconnect-driven and RF-aware design methodology that delivers unprecedented ease-of-use, interactivity, and a single integrated environment for RFIC chip and module design. The Analog Office design system provides an entirely new approach that achieves optimum RF design closure through a unified data model and design environment encompassing all of the design domains. The data model is high-frequency aware, permitting accurate extraction and modeling of all design elements, including active and passive devices, as well as interconnects, at high-frequency. The solution is built on AWR®’s open high-frequency design platform, enabling easy integration of the most capable, best-in-class tools to: capture, synthesize, simulate, optimize, layout, extract, and verify designs from system to final tape-out. The Analog Office design suite is fully integrated into existing digital and mixed signal IC design flows from Cadence and Synopsys, and enables analog and RFIC design engineers to significantly shorten their development cycles and speed wireless products to market. Features: · Fully integrated with the industry-leading APLAC® simulator · Robust Intelligent Net 2 (iNet2) model for faster and more accurate design, simulation, extraction, and chip interconnect layout · Integration to Helic’s VeloceRF for simulation and extraction inductor-to-inductor and inductor-to-line coupling · Streamlined integration to OEA International's NET-AN 3D net extraction technology for on-the-fly interconnect extraction of multiple silicon nets · Advanced current density, operating point and short checking capabilities with iNet2 · Interface to industry physical validation tools: Mentor’s Calibre DRC/LVS and Cadence’s Assura DRC · Multiple technology support for seamless IC - package - module and board co-design · Validated foundry RF design kits · Support for the interoperable PCell libraries (IPL) and OpenAccess database

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